5222-DS02-R datasheet(45/76 Pages) BOARDCOM

45 / 76 page

Preliminary Data Sheet

BCM5222

7/20/04

Broadcom Corporation

Document 5222-DS02-405-R

Auxiliary Control/Status Register

Page 33

JABBER DISABLE

10BASE-T operation only. Bit 15 of the Auxiliary Control register allows the user to disable the jabber detect function, defined

in the IEEE standard. This function shuts off the transmitter when a transmission request has exceeded a maximum time

limit. By writing a 1 to bit 15 of the Auxiliary Control register, the jabber detect function is disabled. Writing a 0 to this bit or

resetting the chip restores normal operation. Reading this bit returns the value of jabber detect disable.

FORCE LINK

Writing a 1 to bit 14 of the Auxiliary Control register allows the user to disable the link integrity state machines, and place the

BCM5222 into forced link pass status. Writing a 0 to this bit or resetting the chip restores the link integrity functions. Reading

this bit returns the value of the force link bit.

10M TRANSMIT POWER MODE

Writing a 1 to bit 8 of the Auxiliary Control register allows the user to enable the 10BASE-T Full Power Mode. Writing a 0 to

this bit or resetting the chip restores the setting to the 10BASE-T Low Power Mode.

HSQ AND LSQ

Extend or decrease the squelch levels for detection of incoming 10BASET data packets. The default squelch levels

implemented are those defined in the IEEE standard. The high-and low-squelch levels are useful for situations where the

IEEE-prescribed levels are inadequate. The squelch levels are used by the CRS/LINK block to filter out noise and recognize

only valid packet preambles and link integrity pulses. Extending the squelch levels allows the BCM5222 to operate properly

over longer cable lengths. Decreasing the squelch levels can be useful in situations where there is a high level of noise

present on the cables. Reading these 2 bits returns the value of the squelch levels.

EDGE RATE

Control bits used to program the transmit DAC output edge rate in both 10BASE-T and 100BASE-TX mode. A larger value

on these bits produces slower transitions on the transmit waveform.

AUTO-NEGOTIATION INDICATION

This read-only bit indicates whether auto-negotiation has been enabled or disabled on the BCM5222. A combination of a 1

in bit 12 of the Control register and a logic 1 on the ANEN input pin is required to enable auto-negotiation. When auto-

negotiation is disabled, bit 3 of the Auxiliary Control register (18h) returns a 0. At all other times, it returns a 1.

FORCE100/10 INDICATION

This read-only bit returns a value of 0 when one of following cases is true:

•

The ANEN pin is low AND the F100 pin is low.

•

The ANEN pin is high AND bit 12 of the Control register has been written 0 and bit 13 of the Control register has been

written 0.

5222-DS02-R 数据表(PDF) 45 Page - Broadcom Corporation.

5222-DS02-R 数据表(HTML) 45 Page - Broadcom Corporation.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

数据表下载