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5222-DS02-R 数据表(PDF) 61 Page - Broadcom Corporation.

部件名 5222-DS02-R
功能描述  Dual Port 10/100BASE-TX IEEE 802.3u Fast Ethernet Transceiver
PDF  76 Pages
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制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

5222-DS02-R 数据表(HTML) 61 Page - Broadcom Corporation.

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Preliminary Data Sheet
BCM5222
7/20/04
Broadcom Corporation
Document 5222-DS02-405-R
Timing and AC Characteristics
Page 49
Figure 6: MII Transmit End of Packet Timing (100BASE-TX)
Table 37 below provides 100BASE-X receive timing parameters. See Figure7onpage50 and Figure 8 onpage51 for
illustrations of 100BASE-TX receive start of packet timing parameters and 100BASE-TX receive end of packet timing.
Figure9onpage51 shows 100BASE-TX receive packet premature end. See Figure 10 on page 52 for an illustration of link
failure or stream cipher error during receive packet. 100BASE-TX False carrier sense timing is shown in
Figure 11 on page 52.
Table 37: MII 100BASE-TX Receive Timing
Parameter
Symbol
Min
Typical
Max
Unit
RXC Cycle Time
40
ns
RXC High/Low Time (RXDV asserted)
16
20
24
ns
RXC High Time (RXDV deasserted)
20
ns
RXC Low Time (RXDV deasserted)
20
ns
RXC Rise/Fall Time
TBD
ns
RXDV, RXER, RXD[3:0] Delay from RXC falling
-4
4
ns
CRS Deassert from RXC falling (valid EOP only)
TBD
ns
CRS Assert after RD
±
RX_CRS
200
ns
CRS Deassert after RD
± (valid EOP)
RX_CRS_EOP
60
240
ns
CRS Deassert after RD
± (premature end)
RX_CRS_IDLE
150
ns
RXDV Assert after RD
±
RX_RXDV
160
ns
RXDV Deassert after RD
± (valid EOP)
RX_RXDV_EOP
200
ns
RXDV Assert after CRS
60
ns
RD
± to RXD Steady State Delay
RX_RXD
180
ns
COL Assert after RD
± (while TX)
RX_COL
200
ns
COL Deassert after RD
± (valid EOP)
RX_COL_EOP
130
240
ns
ESD
TXEN_CRS_EOP
TXEN_COL_EOP
LAST DATA
DATA N
T4 T3 T2 T1 T0 R4 R3 R2 R1 R0
NIBBLE
TD
±
TXD,
TXER
COL
TXEN
CRS
I
I
I
I
X
XTALI
or
TXC



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