5222-DS02-R datasheet(16/76 Pages) BOARDCOM

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BCM5222

Preliminary Data Sheet

7/20/04

Broadcom Corporation

Page 4

Stream Cipher

Document 5222-DS02-405-R

STREAM CIPHER

In 100BASE-TX mode, the transmit data stream is scrambled to reduce radiated emissions on the twisted-pair cable. The

data is scrambled by exclusive ORing the NRZ signal with the output of an 11-bit-wide linear feedback shift register (LFSR),

which produces a 2047-bit non-repeating sequence. The scrambler reduces peak emissions by randomly spreading the

signal energy over the transmit frequency range and eliminating peaks at certain frequencies.

The receiver descrambles the incoming data stream by exclusive ORing it with the same sequence generated at the

transmitter. The descrambler detects the state of the transmit LFSR by looking for a sequence representing consecutive idle

codes. The descrambler locks to the scrambler state after detecting a sufficient number of consecutive idle code-groups.

The receiver does not attempt to decode the data stream unless the descrambler is locked. When locked, the descrambler

continuously monitors the data stream to make sure that it has not lost synchronization. The receive data stream is expected

to contain inter-packet idle periods. If the descrambler does not detect enough idle codes within 724

µs, it becomes unlocked,

and the receive decoder is disabled. The descrambler is always forced into the unlocked state when a link failure condition

is detected.

Stream cipher scrambling/descrambling is not used in 10BASE-T mode.

MII MANAGEMENT

The BCM5222 contains two complete sets of MII management registers accessible by using the management clock line

(MDC) and the bidirectional serial data line (MDIO). Each PHY has one associated MII register which is accessed by

commands containing the corresponding PHY address. By configuring the five external PHY address input pins, the PHY

address of PHY 1 is set. PHY 2 address will be one bit higher than that of PHY 1.

Every time an MII read or write operation is executed, the BCM5222 compares the operation's PHY address with its own

PHY address definition. The operation is executed only when the addresses match.

For further details, see Section 5: “Register Summary” on page 16.

Table 1: 4B5B Encoding

Name

4B Code

5B Code

Meaning

0000

11110

Data 0

0001

01001

Data 1

0010

10100

Data 2

0011

10101

Data 3

0100

01010

Data 4

0101

01011

Data 5

0110

01110

Data 6

0111

01111

Data 7

1000

10010

Data 8

1001

10011

Data 9

1010

10110

Data A

1011

10111

Data B

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