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5222-DS02-R 数据表(PDF) 52 Page - Broadcom Corporation.

部件名 5222-DS02-R
功能描述  Dual Port 10/100BASE-TX IEEE 802.3u Fast Ethernet Transceiver
PDF  76 Pages
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制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

5222-DS02-R 数据表(HTML) 52 Page - Broadcom Corporation.

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BCM5222
Preliminary Data Sheet
7/20/04
Broadcom Corporation
Page 40
Auxiliary Mode Register
Document 5222-DS02-405-R
AUXILIARY MODE REGISTER
Table 24 shows the bit descriptions for the Auxiliary Mode register.
LINK LED DISABLE
When set to 1, disables the Link LED output pin. When 0, Link LED output is enabled.
BLOCK TXEN MODE
When this mode is enabled, short IPGs of 1, 2, 3 or 4 TXC cycles results in the insertion of two IDLEs before the beginning
of the next packet’s JK symbols.
AUXILIARY MULTIPLE PHY REGISTER
Table 24: Auxiliary Mode Register (Address 11101b, 29d, 1Dh)
Bit
Name
R/W
Description
Default
15:5
Reserved
RO
Ignore when read
4
Reserved
R/W
Write as 0, Ignore when Read
0
3
Link LED Disable
R/W
1 = Disable link LED output
0 = Enable link LED output
0
2
Reserved
RO
Ignore when read
0
1
Block TXEN Mode
R/W
1 = Enable block TXEN mode
0 = Disable block TXEN mode
0
0
Reserved
RO
Ignore when read
0
Table 25: Auxiliary Multiple PHY Register (Address 30d, 1Eh)
Bit
Name
R/W
Description
Default
15
HCD_TX_FDX
RO
1 = Auto-negotiation result is 100BASE-TX full-duplex
0
14
HCD_T4
RO
1 = Auto-negotiation result is 100BASE-T4
0
13
HCD_TX
RO
1 = Auto-negotiation result is 100BASE-TX
0
12
HCD_10BASE-T_FDX
RO
1 = Auto-negotiation result is 10BASE-T full-duplex
0
11
HCD_10BASE-T
RO
1 = Auto-negotiation result is 10BASE-T
0
10:9
Reserved
RO
Ignore when read
00
8
Restart Auto-Negotiation
R/W
(SC)
1 = Restart auto-negotiation process
0 = (No effect)
0
7
Auto-Negotiation Complete
RO
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
0
6
Acknowledge Complete
RO
1 = Auto-negotiation acknowledge completed
0
Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after
read operation. Use default values of reserved bit(s) when writing to reserved bit(s).



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