MC56F81663 datasheet(16/73 Pages) NXP

16 / 73 page

Table 2. Signal descriptions (continued)

Signal Name

LQFP

LQFP/

QFN

State

During

Reset

Type

Signal Description

TCK

Input,

internal

pulldown

enabled

Input

Test Clock Input — This input pin provides a gated

clock to synchronize the test logic and shift serial data

to the JTAG/EOnCE port.The pin is connected

internally to a pulldown resistor. A Schmitt-trigger input

is used for noise immunity. After reset, the default state

is TCK.

(GPIOD2)

Input/

Output

GPIO Port D2.

TMS

Input,

internal

pullup

enabled

Input

Test Mode Select Input — Used to sequence the JTAG

TAP controller state machine. It is sampled on the

rising edge of TCK and has an internal pullup resistor.

After reset, the default state is TMS.

NOTE: Always tie the TMS pin to VDD through a 2.2

kΩ resistor if need to keep on-board debug

capability. Otherwise, directly tie to VDD.

Except being configured as GPIO.

(GPIOD3)

Input/

Output

GPIO Port D3.

RESET

Input,

internal

pullup

enabled

Input

Reset — A direct hardware reset on the processor.

When RESET is asserted low, the device is initialized

and placed in the reset state. A Schmitt-trigger input is

used for noise immunity. The internal reset signal is

deasserted synchronously with the internal clocks after

a fixed number of internal clocks. After reset, the

default state is RESET. Recommended a capacitor of

0.1 µF for filtering noise and up to 22 µF for time delay

if required.

(GPIOD4)

Input/

Open-

drain

Output

GPIO Port D4 — Can be individually programmed as

an input or open-drain output pin. RESET functionality

is disabled in this mode and the device can be reset

only through Power-On Reset (POR), COP reset, or

software reset.

GPIOA0

Input

Input/

Output

GPIO Port A0 — After reset, the default state is

GPIOA0.

(ANA0

CMPA_IN3

OPAMPA_IN3)

Input

ANA0 — ADCA input channel 0.

CMPA_IN3 — Analog comparator A input 3

OPAMPA_IN3 — Operational amplifier A input 3

When used as an analog input, the signal goes to

ANA0 and CMPA_IN3 and OPAMPA_IN3. 1

(CMPC_O)

Output

Analog comparator C output.

GPIOA1

Input

Input/

Output

GPIO Port A1 — After reset, the default state is

GPIOA1.

(ANA1

CMPA_IN0

Input

ANA1 — ADCA input channel 1.

CMPA_IN0 — Analog comparator A input 0.

OPAMPA_IN0 — Operational amplifier A input 0.

Table continues on the next page...

MC56F81xxx signal and pin descriptions

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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