MC56F81663 datasheet(56/73 Pages) NXP

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Table 28. 12-bit ADC Electrical Specifications (continued)

Characteristic

Symbol

Min

Typ

Max

Unit

Fully Differential

Single Ended/Unipolar

+/- 8

+/- 12

Gain Error

EGAIN

0.996 to

1.004

0.990 to 1.010

AC Specifications9

Signal to Noise Ratio

SNR

Total Harmonic Distortion

THD

Spurious Free Dynamic Range

SFDR

Signal to Noise plus Distortion

SINAD

Effective Number of Bits

Gain = 1x (Fully Differential/Unipolar)

Gain = 2x (Fully Differential/Unipolar)

Gain = 4x (Fully Differential/Unipolar)

Gain = 1x (Single Ended)

Gain = 2x (Single Ended)

Gain = 4x (Single Ended)

Variation across channels10

ENOB

—

10.6

—

10.3

10.6

10.4

10.2

0.1

bits

ADC Inputs

Input Leakage Current

IIN

Temperature sensor slope

TSLOPE

1.3

mV/°C

Temperature sensor voltage at 25 °C

VTEMP25

0.82

Disturbance

Input Injection Current 11

IINJ

+/-3

Channel to Channel Crosstalk12

ISOXTLK

-82

Memory Crosstalk13

MEMXTLK

-71

Input Capacitance

Sampling Capacitor

CADI

4.8

1. The ADC functions up to VDDA = 2.7 V. When VDDA is below 3.0 V, ADC specifications are not guaranteed

2. ADC clock duty cycle is 45% ~ 55%

3. Conversion range is defined for x1 gain setting. For x2 and x4 the range is 1/2 and 1/4, respectively.

4. In unipolar mode, positive input must be ensured to be always greater than negative input.

5. First conversion takes 10 clock cycles.

6. INL/DNL is measured from VIN = VREFL to VIN = VREFH using Histogram method at x1 gain setting

7. Least Significant Bit = 0.806 mV at 3.3 V VDDA, x1 gain Setting

8. Offset measured at 2048 code

9. Measured converting a 1 kHz input full scale sine wave

10. When code runs from internal RAM

11. The current that can be injected into or sourced from an unselected ADC input without affecting the performance of the

ADC

12. Any off-channel with 50 kHz full-scale input to the channel being sampled with DC input (isolation crosstalk)

13. From a previously sampled channel with 50 kHz full-scale input to the channel being sampled with DC input (memory

crosstalk).

System modules

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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