MC56F81663 datasheet(26/73 Pages) NXP

26 / 73 page

Table 3. Functional Group Pin Allocations

(continued)

Functional Group

Number of Pins

32LQFP

48LQFP

64LQFP

Inter-Integrated Circuit Interface (LPI2C0 and LPI2C1 ) ports

12-bit Analog-to-Digital Converter (ADC) inputs

Analog Comparator inputs/outputs

7/3

11/4

17/6

Analog Operational Amplifier inputs/outputs

5/1

6/2

8/2

12-bit Digital-to-Analog output

Quad Timer Module (TMR) ports

Inter-Module Crossbar inputs/outputs

8/11

13/12

17/19

Clock inputs/outputs

1/1

2/2

JTAG / Enhanced On-Chip Emulation (EOnCE)

1. Not available in 32-pin package.

2. 4-wire mode does not support.

3. Only LPI2C0 supports 4-wire mode.

4 Pinout

4.1 Signal Multiplexing and Pin Assignments

The following table shows the signals available on each pin and the locations of these

pins on the devices supported by this document. The Port Control Module is responsible

for selecting which ALT functionality is available on each pin.

LQFP

Pin Name

Default

ALT0

ALT1

ALT2

ALT3

TCK

GPIOD2

RESET_B

GPIOD4

—

GPIOC0

EXTAL

CLKIN0

—

GPIOC1

XTAL

GPIOC2

TXD0

XB_OUT11

XB_IN2

CLKO0

—

GPIOF8

RXD0

XB_OUT10

CMPD_O

PWMA_2X

GPIOC3

TA0

CMPA_O

RXD0

CLKIN1

GPIOC4

TA1

CMPB_O

XB_IN8

OPAMPA_OUT

—

GPIOA7

ANA7+CMPD_IN3

—

GPIOA6

ANA6+CMPD_IN2

—

GPIOA5

ANA5+CMPD_IN1

—

GPIOA4

ANA4+CMPD_IN0

GPIOA0

ANA0+CMPA_

IN3+OPAMPA_IN3

CMPC_O

Pinout

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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