MC56F81663 datasheet(43/73 Pages) NXP

43 / 73 page

Table 9. Voltage and current operating behaviors (continued)

Symbol

Description

Min.

Max.

Unit

Notes

IIN

Input leakage current (total all pins) for full temperature

range

—

μA

IOZ

Hi-Z (off-state) leakage current (per pin)

—

μA

—

RPU

Internal pullup resistors

kΩ

RPD

Internal pulldown resistors

kΩ

1. The reset pin only contains an active pull down device when configured as the RESET signal or as a GPIO. When

configured as a GPIO output, it acts as a pseudo open drain output.

2. GPIOC2, GPIOC7~12, GPIOF2~3 and GPIOC14~15 support high drive strength mode.

3. Measured at VDD = 3.6 V

4. Measured at VDD supply voltage = VDD min and Vinput = VSS

5. Measured at VDD supply voltage = VDD min and Vinput = VDD

10.3.4 Power mode transition operating behaviors

Parameters listed are guaranteed by design.

NOTE

All address and data buses described here are internal.

Table 10. Reset, stop, wait, and interrupt timing

Characteristic

Symbol

Typical Min

Typical

Max

Unit

See

Figure

Minimum RESET Assertion Duration

tRA

16 1

—

RESET deassertion to First Address Fetch

tRDA

865 × TOSC + 8 × T

—

Delay from Interrupt Assertion to Fetch of first

instruction (exiting Stop)

tIF

361.3

570.9

—

1. If the RESET pin filter is enabled by setting the RST_FLT bit in the SIM_CTRL register to 1, the minimum pulse assertion

must be greater than 21 ns. Recommended a capacitor of up to 0.1 µF on RESET.

NOTE

In Table 10, T = system clock cycle and TOSC = oscillator clock

cycle. For an operating frequency of 50MHz, T=20 ns. At 4

MHz (used coming out of reset and stop modes), T=250 ns.

Table 11. Power mode transition behavior

Symbol

Description

Typical

Max

Unit

Notes1

TPOR

After a POR event, the amount of delay from when VDD reaches

2.7 V to when the first instruction executes (over the operating

temperature range).

250

288

µs

STOP mode to RUN mode

7.10

8.17

µs

Table continues on the next page...

General

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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