MC56F81663 datasheet(45/73 Pages) NXP

45 / 73 page

Table 12. Current Consumption (Unit: mA) (continued)

Mode

Maximum

Frequency

Conditions

Typical at

3.3 V,

25°C

Maximum

at 3.6 V,

105°C

Maximum

at 3.6V,

125°C

IDD1 IDDA IDD1 IDDA IDD1 IDDA

• Regulators are in full regulation

• Relaxation Oscillator on

• PLL powered on

• Processor Core in WAIT state

• All Peripheral modules enabled.

• TMRs and SCIs using 1X Clock

• NanoEdge within PWMA using 2X clock

• ADC/DAC (single 12-bit DAC, all 8-bit DACs),

Comparator powered off

STOP

4 MHz

• 4 MHz Device Clock

• Regulators are in full regulation

• Relaxation Oscillator on

• PLL powered off

• Processor Core in STOP state

• All peripheral module and core clocks are off

• ADC/DAC/Comparator powered off

4.4

—

12.5

—

13.1

—

LPRUN

(LsRUN)

2 MHz

• 200 kHz Device Clock from Relaxation Oscillator's

(ROSC) low speed clock

• ROSC in standby mode

• Regulators are in standby

• PLL disabled

• Repeat NOP instructions

• All peripheral modules enabled, except NanoEdge

and cyclic ADCs. One 12-bit DAC and all 8-bit

DACs enabled.

• Simple loop with running from platform instruction

buffer

1.1

2.4

11.1

4.0

12.8

4.0

LPWAIT

(LsWAIT)

2 MHz

• 200 kHz Device Clock from Relaxation Oscillator's

(ROSC) low speed clock

• ROSC in standby mode

• Regulators are in standby

• PLL disabled

• All peripheral modules enabled, except NanoEdge

and cyclic ADCs. One 12-bit DAC and all 8-bit

DACs enabled.2

• Processor core in wait mode

1.0

2.4

11.1

4.0

12.8

4.0

LPSTOP

(LsSTOP)

2 MHz

• 200 kHz Device Clock from Relaxation Oscillator's

(ROSC) low speed clock

• ROSC in standby mode

• Regulators are in standby

• PLL disabled

• Only PITs and COP enabled; other peripheral

modules disabled and clocks gated off2

• Processor core in stop mode

1.0

—

9.1

—

10.5

—

VLPRUN

200 kHz

• 32 kHz Device Clock

• Clocked by a 64 kHz external clock source

• Oscillator in power down

• All ROSCs disabled

• Large regulator is in standby

• Small regulator is disabled

0.4

—

7.5

—

9.0

—

Table continues on the next page...

General

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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