MC56F81663 datasheet(21/73 Pages) NXP

21 / 73 page

Table 2. Signal descriptions (continued)

Signal Name

LQFP

LQFP/

QFN

State

During

Reset

Type

Signal Description

(SS0_B)

Input/

Output

SPI0 slave select.

(TXD0)

Output

SCI0 transmit data output or transmit/receive in single

wire operation.

(XB_IN8)

Input

Crossbar module input 8.

(XB_OUT6)

Output

Crossbar module output 6.

GPIOC8

Input

Input/

Output

GPIO Port C8 — After reset, the default state is

GPIOC8.

(MISO0)

Input/

Output

SPI0 master in/slave out.

(RXD0)

Input

SCI0 receive data input.

(XB_IN9)

Input

Crossbar module input 9.

GPIOC9

Input

Input/

Output

GPIO Port C9 — After reset, the default state is

GPIOC9.

(SCLK0)

Input/

Output

SPI0 serial clock.

(XB_IN4)

Input

Crossbar module input 4.

(TXD0)

Output

SCI0 transmit data output or transmit/receive in single

wire operation.

(XB_OUT8)

Output

Crossbar module output 8.

GPIOC10

Input

Input/

Output

GPIO Port C10 — After reset, the default state is

GPIOC10.

(MOSI0)

Input/

Output

SPI0 master out/slave.

(XB_IN5)

Input

Crossbar module input 5.

(MISO0)

Input/

Output

SPI0 master in/slave out.

(XB_OUT9)

Output

Crossbar module output 9.

GPIOC11

—

Input

Input/

Output

GPIO Port C11 — After reset, the default state is

GPIOC11.

(LP_SCLS0)

Output

I2C0 secondary serial clock line.

NOTE: In 4-wire mode, this is the I2C slave SCL

output for voltage level shift.

(LP_SCL1)

Input/

Open-

drain

Output

I2C1 serial clock line.

NOTE: In 4-wire mode, this is the I2C slave SCL input.

(TXD1)

Output

SCI1 transmit data output or transmit/receive in single

wire operation.

(PWMA_0X)

Output

PWM submodule 0, output X or input capture X.

GPIOC12

—

Input

Input/

Output

GPIO Port C12 — After reset, the default state is

GPIOC12.

(LP_SDAS0)

Output

I2C0 secondary serial data line.

Table continues on the next page...

MC56F81xxx signal and pin descriptions

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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