MC56F81663 datasheet(55/73 Pages) NXP

55 / 73 page

Table 27. NVM reliability specifications (continued)

Symbol

Description

Min.

Typ.1

Max.

Unit

Notes

nnvmcycp Cycling endurance

10 K

50 K

—

cycles

nnvmcycp Cycling endurance

1 K

—

cycles

1. Typical data retention values are based on measured response accelerated at high temperature and derated to a constant

25 °C use profile. Engineering Bulletin EB618 does not apply to this technology. Typical endurance defined in Engineering

Bulletin EB619.

2. Cycling endurance represents number of program/erase cycles at –40 °C ≤ Tj ≤ 125 °C.

3. Cycling endurance represents number of program/erase cycles at –40 °C ≤ Tj ≤ 135 °C. If the product application is

exposed to Tj > 125 °C, the reduced W/E spec applies independent of the number of W/E cycles in the high Tj band.

11.5 Analog

11.5.1 12-bit Cyclic Analog-to-Digital Converter (ADC) Parameters

Table 28. 12-bit ADC Electrical Specifications

Characteristic

Symbol

Min

Typ

Max

Unit

Recommended Operating Conditions

Supply Voltage1

VDDA

3.3

3.6

VREFH (in external reference mode)

Vrefhx

VDDA-0.6

VDDA

ADC Conversion Clock2

fADCCLK

0.1

12.5

MHz

Conversion Range3

Fully Differential

Single Ended/Unipolar

RAD

– (VREFH – VREFL)

VREFL

VREFH – VREFL

VREFH

Input Voltage Range (per input)4

External Reference

Internal Reference

VADIN

VREFL

VREFH

VDDA

Timing and Power

Conversion Time5

tADC

ADC Clock

Cycles

ADC Power-Up Time (from adc_pdn)

tADPU

ADC Clock

Cycles

ADC RUN Current (per ADC block)

IADRUN

2.5

ADC Powerdown Current (adc_pdn

enabled)

IADPWRDWN

0.1

µA

VREFH Current (in external mode)

IVREFH

190

225

µA

Accuracy (DC or Absolute)

Integral non-Linearity6

INL

+/- 1.5

+/- 2.2

LSB7

Differential non-Linearity6

DNL

+/- 0.5

+/- 0.8

LSB7

Monotonicity

GUARANTEED

Offset8

VOFFSET

Table continues on the next page...

System modules

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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