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LSM6DSTX 数据表(PDF) 125 Page - STMicroelectronics |
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LSM6DSTX 数据表(HTML) 125 Page - STMicroelectronics |
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125 / 175 page  13.45 EMB_FUNC_INIT_B (67h) Embedded functions initialization register (R/W) Table 319. EMB_FUNC_INIT_B register 0(1) 0(1) 0(1) MLC_INIT FIFO_ COMPR_INIT 0(1) 0(1) FSM_INIT 1. This bit must be set to 0 for the correct operation of the device. Table 320. EMB_FUNC_INIT_B register description MLC_INIT Machine learning core initialization request. Default value: 0 FIFO_COMPR_INIT FIFO compression feature initialization request. Default value: 0 FSM_INIT FSM initialization request. Default value: 0 13.46 MLC0_SRC (70h) Machine learning core source register (R) Table 321. MLC0_SRC register MLC0_ SRC_7 MLC0_ SRC_6 MLC0_ SRC_5 MLC0_ SRC_4 MLC0_ SRC_3 MLC0_ SRC_2 MLC0_ SRC_1 MLC0_ SRC_0 Table 322. MLC0_SRC register description MLC0_SRC_[7:0] Output value of MLC0 decision tree 13.47 MLC1_SRC (71h) Machine learning core source register (R) Table 323. MLC1_SRC register MLC1_ SRC_7 MLC1_ SRC_6 MLC1_ SRC_5 MLC1_ SRC_4 MLC1_ SRC_3 MLC1_ SRC_2 MLC1_ SRC_1 MLC1_ SRC_0 Table 324. MLC1_SRC register description MLC1_SRC_[7:0] Output value of MLC1 decision tree 13.48 MLC2_SRC (72h) Machine learning core source register (R) Table 325. MLC2_SRC register MLC2_ SRC_7 MLC2_ SRC_6 MLC2_ SRC_5 MLC2_ SRC_4 MLC2_ SRC_3 MLC2_ SRC_2 MLC2_ SRC_1 MLC2_ SRC_0 Table 326. MLC2_SRC register description MLC2_SRC_[7:0] Output value of MLC2 decision tree LSM6DSTX EMB_FUNC_INIT_B (67h) DS14039 - Rev 1 page 125/175 |
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