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ADC3908CSSS 数据表(PDF) 66 Page - Texas Instruments

部件名 ADC3908CSSS
功能描述  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125-MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
PDF  131 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

ADC3908CSSS 数据表(HTML) 66 Page - Texas Instruments

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Table 6-43. OUTPUT_BIT_MAPPER_D4_D5 Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
3:0
OUTPUT_BIT_MAPPER_
D4
R/W
4h
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
6.6.1.38 OUTPUT_BIT_MAPPER_D6_D7 Register (Address = B1h) [Reset = 86h]
Return to the Summary Table.
Table 6-44. OUTPUT_BIT_MAPPER_D6_D7 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:4
OUTPUT_BIT_MAPPER_
D7
R/W
8h
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
3:0
OUTPUT_BIT_MAPPER_
D6
R/W
6h
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
6.6.1.39 OUTPUT_BIT_MAPPER_D8_D9 Register (Address = B2h) [Reset = 92h]
Return to the Summary Table.
ADC3910D125
SBASAD1 – DECEMBER 2023
www.ti.com
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Product Folder Links: ADC3910D125



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