 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ADC3908CSSS 数据表(PDF) 74 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
ADC3908CSSS 数据表(HTML) 74 Page - Texas Instruments |
|
|
74 / 131 page  6.6.1.70 COMP_DDC_DATA_SEL Register (Address = 203h) [Reset = 21h] Return to the Summary Table. Table 6-76. COMP_DDC_DATA_SEL Register Field Descriptions Bit Field Type Reset Description 5:3 COMP_DATA_SEL_CHB R/W 1h Data select for channel B comparator 000b = Channel A digital downconverter 001b = ADC channel B (default) 100b = Average of channel A and channel B data 101b = Channel A correction block 110b = Channel B correction block 2:0 DDC_DATA_SEL_CHB R/W 1h Data select for channel B decimation 000b = ADC channel A 001b = ADC channel B (default) 6.6.1.71 OUTPUT_STATS_DATA_SEL Register (Address = 204h) [Reset = 21h] Return to the Summary Table. Table 6-77. OUTPUT_STATS_DATA_SEL Register Field Descriptions Bit Field Type Reset Description 5:3 OUTPUT_DATA_SEL_CH B R/W 1h Data select for channel B output 000b = Channel A digital downconverter 001b = ADC channel B (default) 100b = Average of channel A and channel B data 101b = Channel A correction block 110b = Channel B correction block 2:0 STATS_DATA_SEL_CHB R/W 1h Data select for channel B statistics engine 000b = Channel A digital downconverter 001b = ADC channel B (default) 100b = Average of channel A and channel B data 101b = Channel A correction block 110b = Channel B correction block 6.6.1.72 OVR_CHB Register (Address = 205h) [Reset = F0h] Return to the Summary Table. Table 6-78. OVR_CHB Register Field Descriptions Bit Field Type Reset Description 6:3 OVR_CHB R/W Fh Channel B overrange control. This register is a mask with all sources enabled by default. Bit 0: Truncation overrange Bit 1: Channel Correction overrange Bit 2: Decimation overrange Bit 3: ADC overrange 2:0 RESERVED R 0h 6.6.1.73 OVR_CHA Register (Address = 206h) [Reset = Fh] Return to the Summary Table. Table 6-79. OVR_CHA Register Field Descriptions Bit Field Type Reset Description 3:0 OVR_CHA R Fh Channel A overrange control. This register is a mask with all sources enabled by default. Bit 0: Truncation overrange Bit 1: Channel Correction overrange Bit 2: Decimation overrange Bit 3: ADC overrange ADC3910D125 SBASAD1 – DECEMBER 2023 www.ti.com 74 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: ADC3910D125 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
