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ADC3908CSSS 数据表(PDF) 76 Page - Texas Instruments

部件名 ADC3908CSSS
功能描述  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125-MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
PDF  131 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

ADC3908CSSS 数据表(HTML) 76 Page - Texas Instruments

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Table 6-84. BUF_VCM_CURR Register Field Descriptions
Bit
Field
Type
Reset
Description
5:4
BUF_CURR_CHB__1:0
R/W
0h
ADC channel B input buffer PTAT current source mask LSB's used
for gain tracking across temperature for stability.
00b = 19.9uA (default)
01b = 26.5uA
10b = 13.3uA
11b = 19.9uA
100b = 29.9uA
101b = 36.5uA
110b = 23.3uA
111b = 29.9uA
1000b = 6.6uA
1001b = 13.2uA
1010b = 0uA
1011b = 6.6uA
1100b = 16.6uA
1101b = 23.2uA
1110b = 10uA
1111b = 16.6uA
3:0
VCM_CURR
R/W
0h
VCM buffer PTAT current source mask used for gain tracking across
temperature for stability.
0000b = 19.9uA (default)
0001b = 26.5uA
0010b = 13.3uA
0011b = 19.9uA
0100b = 29.9uA
0101b = 36.5uA
0110b = 23.3uA
0111b = 29.9uA
1000b = 6.6uA
1001b = 13.2uA
1010b = 0uA
1011b = 6.6uA
1100b = 16.6uA
1101b = 23.2uA
1110b = 10uA
1111b = 16.6uA
6.6.1.79 BUF_CURR Register (Address = 30Ah) [Reset = 00h]
Return to the Summary Table.
Table 6-85. BUF_CURR Register Field Descriptions
Bit
Field
Type
Reset
Description
6
FORMAT_DIG
R/W
0h
Output Data Format when digital features are used.
0b = Two's Complement
1b = Offset binary
ADC3910D125
SBASAD1 – DECEMBER 2023
www.ti.com
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: ADC3910D125



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