TMP86FS49AIUG datasheet(160/296 Pages) TOSHIBA

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Page 144

12. Asynchronous Serial interface (UART1 )

12.6 STOP Bit Length

TMP86FS49AIUG

12.6 STOP Bit Length

Select a transmit stop bit length (1 bit or 2 bits) by UART1CR1<STBT>.

12.7 Parity

Set

parity

UART1CR1<PE>

and

set

parity

type

(Odd-

Even-numbered)

UART1CR1<EVEN>.

12.8 Transmit/Receive Operation

12.8.1 Data Transmit Operation

Set UART1CR1<TXE> to “1”. Read UART1SR to check UART1SR<TBEP> = “1”, then write data in

TD1BUF (Transmit data buffer). Writing data in TD1BUF zero-clears UART1SR<TBEP>, transfers the data

to the transmit shift register and the data are sequentially output from the TXD1 pin. The data output include a

one-bit start bit, stop bits whose number is specified in UART1CR1<STBT> and a parity bit if parity addition

is specified. Select the data transfer baud rate using UART1CR1<BRG>. When data transmit starts, transmit

buffer empty flag UART1SR<TBEP> is set to “1” and an INTTXD1 interrupt is generated.

While UART1CR1<TXE> = “0” and from when “1” is written to UART1CR1<TXE> to when send data are

written to TD1BUF, the TXD1 pin is fixed at high level.

When transmitting data, first read UART1SR, then write data in TD1BUF. Otherwise, UART1SR<TBEP> is

not zero-cleared and transmit does not start.

12.8.2 Data Receive Operation

Set UART1CR1<RXE> to “1”. When data are received via the RXD1 pin, the receive data are transferred to

RD1BUF (Receive data buffer). At this time, the data transmitted includes a start bit and stop bit(s) and a parity

bit if parity addition is specified. When stop bit(s) are received, data only are extracted and transferred to

RD1BUF (Receive data buffer). Then the receive buffer full flag UART1SR<RBFL> is set and an INTRXD1

interrupt is generated. Select the data transfer baud rate using UART1CR1<BRG>.

If an overrun error (OERR) occurs when data are received, the data are not transferred to RD1BUF (Receive

data buffer) but discarded; data in the RD1BUF are not affected.

Note:When a receive operation is disabled by setting UART1CR1<RXE> bit to “0”, the setting becomes valid when

data receive is completed. However, if a framing error occurs in data receive, the receive-disabling setting

may not become valid. If a framing error occurs, be sure to perform a re-receive operation.

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