TMP86FS49AIUG datasheet(170/296 Pages) TOSHIBA

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Page 154

13. Asynchronous Serial interface (UART2 )

13.6 STOP Bit Length

TMP86FS49AIUG

13.6 STOP Bit Length

Select a transmit stop bit length (1 bit or 2 bits) by UART2CR1<STBT>.

13.7 Parity

Set

parity

UART2CR1<PE>

and

set

parity

type

(Odd-

Even-numbered)

UART2CR1<EVEN>.

13.8 Transmit/Receive Operation

13.8.1 Data Transmit Operation

Set UART2CR1<TXE> to “1”. Read UART2SR to check UART2SR<TBEP> = “1”, then write data in

TD2BUF (Transmit data buffer). Writing data in TD2BUF zero-clears UART2SR<TBEP>, transfers the data

to the transmit shift register and the data are sequentially output from the TXD2 pin. The data output include a

one-bit start bit, stop bits whose number is specified in UART2CR1<STBT> and a parity bit if parity addition

is specified. Select the data transfer baud rate using UART2CR1<BRG>. When data transmit starts, transmit

buffer empty flag UART2SR<TBEP> is set to “1” and an INTTXD2 interrupt is generated.

While UART2CR1<TXE> = “0” and from when “1” is written to UART2CR1<TXE> to when send data are

written to TD2BUF, the TXD2 pin is fixed at high level.

When transmitting data, first read UART2SR, then write data in TD2BUF. Otherwise, UART2SR<TBEP> is

not zero-cleared and transmit does not start.

13.8.2 Data Receive Operation

Set UART2CR1<RXE> to “1”. When data are received via the RXD2 pin, the receive data are transferred to

RD2BUF (Receive data buffer). At this time, the data transmitted includes a start bit and stop bit(s) and a parity

bit if parity addition is specified. When stop bit(s) are received, data only are extracted and transferred to

RD2BUF (Receive data buffer). Then the receive buffer full flag UART2SR<RBFL> is set and an INTRXD2

interrupt is generated. Select the data transfer baud rate using UART2CR1<BRG>.

If an overrun error (OERR) occurs when data are received, the data are not transferred to RD2BUF (Receive

data buffer) but discarded; data in the RD2BUF are not affected.

Note:When a receive operation is disabled by setting UART2CR1<RXE> bit to “0”, the setting becomes valid when

data receive is completed. However, if a framing error occurs in data receive, the receive-disabling setting

may not become valid. If a framing error occurs, be sure to perform a re-receive operation.

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