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TMP86FS49AIUG 数据表(PDF) 210 Page - Toshiba Semiconductor |
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TMP86FS49AIUG 数据表(HTML) 210 Page - Toshiba Semiconductor |
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210 / 296 page  Page 194 15. Synchronous Serial Interface (SIO2) 15.3 Function TMP86FS49AIUG Figure 15-16 Example of Transmit/Receive (Receive) Error Processing Note: If receive error is not corrected, an interrupt request does not generate after the error occurs. Figure 15-17 Hold Time of the End of Transmit/Receive Mode Writing transmit data C Writing transmit data B Writing transmit data A Unknown C B A7 A6 A A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 D7 D6 D5 D4 D3 D2 D1 D0 E7 E6 E5 E4 E3 E2 E1 E0 F7 F6 F5 F4 F3 F2 F1 F0 Start shift operation Start shift operation Start shift operation Reading received data E Reading received data D OOH E D SIO2CR<SIOS> SIO2SR<SIOF> SIO2SR<SEF> SCK2 pin output SO2 pin SI2 pin INTSIO2 interrupt request SIO2SR<TXF> SIO2SR<RXF> SIO2RDB SIO2TDB SIO2CR<SIOINH> SIO2SR<RXERR> 4/fc 8/fc tSODH tSODH < < SCK2 pin SIO2SR<SIOF> SO2 pin |
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