TMP86FS49AIUG datasheet(244/296 Pages) TOSHIBA

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19. Flash Memory

19.4 Access to the Flash Memory Area

TMP86FS49AIUG

19.4 Access to the Flash Memory Area

When the write, erase and read protections are set in the flash memory, read and fetch operations cannot be per-

formed in the entire flash memory area. Therefore, to perform these operations in the entire flash memory area,

access to the flash memory area by the control program in the BOOTROM or RAM area. (The flash memory pro-

gram cannot write to the flash memory.) The serial PROM or MCU mode is used to run the control program in the

BOOTROM or RAM area.

Note 1: The flash memory can be written or read for each byte unit. Erase operations can be performed either in the entire

area or in units of 4 kbytes, whereas read operations can be performed by an one transfer instruction. However,

the command sequence method is adopted for write and erase operations, requiring several-byte transfer instruc-

tions for each operation.

Note 2: To rewrite data to Flash memory addresses at which data (including FFH) is already written, make sure to erase

the existing data by "sector erase" or "chip erase" before rewriting data.

19.4.1 Flash Memory Control in the Serial PROM Mode

The serial PROM mode is used to access to the flash memory by the control program provided in the

BOOTROM area. Since almost of all operations relating to access to the flash memory can be controlled sim-

ply by the communication data of the serial interface (UART), these functions are transparent to the user. For

the details of the serial PROM mode, see “Serial PROM Mode.”

To access to the flash memory by using peripheral functions in the serial PROM mode, run the RAM loader

command to execute the control program in the RAM area. The procedures to execute the control program in

the RAM area is shown in " 19.4.1.1 How to write to the flash memory by executing the control program in the

RAM area (in the RAM loader mode within the serial PROM mode) ".

19.4.1.1 How to write to the flash memory by executing the control program in the RAM area (in

the RAM loader mode within the serial PROM mode)

(Steps 1 and 2 are controlled by the BOOTROM, and steps 3 through 10 are controlled by the control

program executed in the RAM area.)

1. Transfer the write control program to the RAM area in the RAM loader mode.

2. Jump to the RAM area.

3. Disable (DI) the interrupt master enable flag (IMF

←"0").

4. Set FLSCR<FLSMD> to "0011B" (to enable command sequence execution).

5. Execute the erase command sequence.

6. Read the same flash memory address twice.

(Repeat step 6 until the same data is read by two consecutive reads operations.)

7. Specify the bank to be written in FLSCR<BANKSEL>.

8. Execute the write command sequence.

9. Read the same flash memory address twice.

(Repeat step 9 until the same data is read by two consecutive reads operations.)

10. Set FLSCR<FLSMD> to "1100B" (to disable command sequence execution).

Note 1: Before writing to the flash memory in the RAM area, disable interrupts by setting the interrupt master

enable flag (IMF) to "0". Usually disable interrupts by executing the DI instruction at the head of the

write control program in the RAM area.

Note 2: Since the watchdog timer is disabled by the BOOTROM in the RAM loader mode, it is not required to

disable the watchdog timer by the RAM loader program.

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