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ST18952 数据表(PDF) 9 Page - STMicroelectronics |
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ST18952 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 67 page  9/66 ST18952 3 Functional Overview A block diagram of the ST18952 is shown below. The modules that comprise the ST18952 are outlined in this section and described in detail in the following sections. Figure 3.1 ST18952 block diagram Y X D950Core DMA TAP Interrupt 8k x 16 Bus 8k x 16 8k x 16 I OSC + PLL X/Y 0.5k x 16 Emulation Control I/Os/ Port JTAG Port (x 4) Output clocks Input clock + control Timer 0 SIO 1 Timer 1 SIO 0 controller switch unit unit controller Direct extension buses Ext. bus |
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