数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST18952 数据表(PDF) 23 Page - STMicroelectronics

部件名 ST18952
功能描述  DIGITAL SIGNAL PROCESSOR DSP CHIP
PDF  67 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST18952 数据表(HTML) 23 Page - STMicroelectronics

Back Button ST18952 Datasheet HTML 19Page - STMicroelectronics ST18952 Datasheet HTML 20Page - STMicroelectronics ST18952 Datasheet HTML 21Page - STMicroelectronics ST18952 Datasheet HTML 22Page - STMicroelectronics ST18952 Datasheet HTML 23Page - STMicroelectronics ST18952 Datasheet HTML 24Page - STMicroelectronics ST18952 Datasheet HTML 25Page - STMicroelectronics ST18952 Datasheet HTML 26Page - STMicroelectronics ST18952 Datasheet HTML 27Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 67 page
background image
23/66
ST18952
7.2
DMA registers
Address registers
Two 16-bit registers (unsigned) are dedicated per channel for address transfer:
• DIA: initial address. Contains the initial address of the selected address bus
(see DBC-bit of DGC register).
• DCA: current address. Contains the value to be transferred to the selected
address bus (see DBC-bit of DGC register) during the next transfer. The
different DCA values are:
Note:
See ”DAIC: Address/interrupt control register” on page 24 for DAI and DLA definitions
Counting registers
Two 16-bit registers (unsigned) per channel are dedicated for count transfer.
For a transfer of an N data block, DIC and DCC registers have to be loaded with N-1.
When DCC content is 0 (valid transfer count), it is loaded with DIC content for the next transfer.
• DIC: initial count. Contains the total number of transfers of the entire block
• DCC: current count. Contains the remaining number of transfers required to fill
the entire block. It is decremented after each transfer. The DCC values are:
Control registers
Three 16-bit control registers are dedicated to the DMA controller interface. These are the
general control register, the address interrupt control register and the mask sensitivity control
register. They are detailed below.
Reset
DAI
DLA
DCC = 0
DCA(n+1)
1
XXX
0
0
0
X
X
DCA(n)
0
1
0
X
DCA(n) + 1
0110
DCA(n) + 1
0111
DIA
Reset
DCC = 0
DCA(n+1)
1X
0
0
0
DCA(n) - 1
0
1
DIC



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com