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ST18952 数据表(PDF) 25 Page - STMicroelectronics |
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ST18952 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 67 page ![]() 25/66 ST18952 DMS: Mask sensitivity control register Two bits are dedicated to each DMA channel (bits 0 and 1 to channel 0, bits 4 and 5 to channel 1, bits 8 and 9 to channel 2, bits 12 and 13 to channel 3). (Address = 0041, Reset = x3333h, Read/Write) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - - DSE3 DMK3 - - DSE2 DMK2 - - DSE1 DMK1 - - DSE0 DMK0 Bit Function DMKi DMA mask 0: DMA channel not masked 1: DMA channel masked (default) DSEi DMA sensitivity 0: Low level 1: Falling edge (default) |
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