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T89C51AC2-RLSI-M 数据表(PDF) 71 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 71 Page - ATMEL Corporation |
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71 / 117 page ![]() Draft.A - March 30, 2001 71 Preview - Confidential T89C51AC2 14.2. WatchDog Programming The three lower bits (S0, S1, S2) located into WDTPRG register permits to program the WDT duration. Table 19. Machine Cycle Count To compute WD Time-Out, the following formula is applied: Note: Svalue represents the decimal value of (S2 S1 S0) Find Hereafter computed Time-Out value for FoscXTAL = 12MHz Table 20. Time-Out Computation S2 S1 S0 Machine Cycle Count 000 214 -1 001 215 -1 010 216 -1 011 217 -1 100 218 -1 101 219 -1 110 220 -1 111 221 -1 S2 S1 S0 Fosc=12MHz Fosc=16MHz Fosc=20MHz 0 0 0 16.38 ms 12.28 ms 9.82 ms 0 0 1 32.77 ms 24.57 ms 19.66 ms 0 1 0 65.54 ms 49.14 ms 39.32 ms 0 1 1 131.07 ms 98.28 ms 78.64 ms 1 0 0 262.14 ms 196.56 ms 157.28 ms 1 0 1 524.29 ms 393.12 ms 314.56 ms 1 1 0 1.05 s 786.24 ms 629.12 ms 1 1 1 2.10 s 1.57 s 1.25 ms FTime Out F XTAL 12 2 14 2 Svalue × () 1 – () × ------------------------------------------------------------- = – |
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