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T89C51AC2-RLSI-M 数据表(PDF) 37 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 37 Page - ATMEL Corporation |
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37 / 117 page ![]() Draft.A - March 30, 2001 37 Preview - Confidential T89C51AC2 AUXR1 (S:A2h) Auxiliary Control Register 1. Reset Value= XXXX 00X0b Figure 25. AUXR1 Register 7 6 5 4 3 2 1 0 - - ENBOOT - GF3 0 - DPS Bit Number Bit Mnemonic Description 7-6 - Reserved The value read from these bits is indeterminate. Do not set these bits. 5 ENBOOT Enable Boot Flash Set this bit for map the boot flash between F800h -FFFFh Clear this bit for disable boot flash. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3 GF3 General Purpose Flag 3. 20 Always Zero This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag. 1- Reserved for Data Pointer Extension. 0 DPS Data Pointer Select Bit Set to select second dual data pointer: DPTR1. Clear to select first dual data pointer: DPTR0. |
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