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T89C51AC2-RLSI-M 数据表(PDF) 4 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 4 Page - ATMEL Corporation |
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4 / 117 page ![]() 4 Draft.A - March 30, 2001 Preview - Confidential T89C51AC2 Table 1. Pin Description Pin Name Type Description VSS GND Circuit ground potential. VCC Supply voltage during normal, idle, and power-down operation. VAREF Reference Voltage for ADC VAGND Reference Ground for ADC P0.0:7 I/O Port 0: is an 8-bit open drain bi-directional I/O port. Port 0 pins that have 1’s written to them float, and in this state can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external Program and Data Memory. In this application it uses strong internal pull- ups when emitting 1’s. Port 0 also outputs the code bytes during program validation. External pull-ups are required during program verification. In the T89C51AC2 Port 0 can sink or source 5mA. It can drive CMOS inputs without external pull-ups. P1.0:7 I/O Port 1: is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins can be used for digital input/output or as analog inputs for the Analog Digital Converter (ADC). Port 1 pins that have 1’s written to them are pulled high by the internal pull-up transistors and can be used as inputs in this state. As inputs, Port 1 pins that are being pulled low externally will be the source of current (IIL, on the datasheet) because of the internal pull-ups. Port 1 pins are assigned to be used as analog inputs via the ADCCF register. As a secondary digital function, port 1 contains the Timer 2 external trigger and clock input; the PCA external clock input and the PCA module I/O. P1.0 / AN0 / T2 Analog input channel 0, External clock input for Timer/counter2. P1.1 / AN1 / T2EX Analog input channel 1, Trigger input for Timer/counter2. P1.2 / AN2 / ECI Analog input channel 2, PCA external clock input. P1.3 / AN3 / CEX0 Analog input channel 3, PCA module 0 Entry of input/PWM output. P1.4 / AN4 / CEX1 Analog input channel 4, PCA module 1 Entry of input/PWM output. P1.5 / AN5 / CEX2 Analog input channel 5, PCA module 2 Entry of input/PWM output. P1.6 / AN6 / CEX3 Analog input channel 6, PCA module 3 Entry of input/PWM output. P1.7 / AN7 / CEX4 Analog input channel 7, PCA module 4 Entry ot input/PWM output. Port 1 receives the low-order address byte during EPROM programming and program verification. In the T89C51AC2 Port 1 can sink or source 5mA. It can drive CMOS inputs without external pull-ups. P2.0:7 I/O Port 2: Is an 8-bit bi-directional I/O port with internal pull-ups. Port 2 pins that have 1’s written to them are pulled high by the internal pull-ups and can be used as inputs in this state. As inputs, Port 2 pins that are being pulled low externally will be a source of current (IIL, on the datasheet) because of the internal pull-ups. Port 2 emits the high-order address byte during accesses to the external Program Memory and during accesses to external Data Memory that uses 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1’s. During accesses to external Data Memory that use 8 bit addresses (MOVX @Ri), Port 2 transmits the contents of the P2 special function register. It also receives high-order addresses and control signals during program validation. In the T89C51AC2 Port 2 can sink or source 5mA. It can drive CMOS inputs without external pull-ups. |
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