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T89C51AC2-RLSI-M 数据表(PDF) 73 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 73 Page - ATMEL Corporation |
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73 / 117 page ![]() Draft.A - March 30, 2001 73 Preview - Confidential T89C51AC2 14.4. Register WDTPRG (S:A7h) WatchDog Timer Duration Programming register Reset Value = XXXX X000b Figure 62. WDTPRG Register WDTRST (S:A6h Write only) WatchDog Timer Enable register Reset Value = 1111 1111b NOTE: The WDRST register is used to reset/enable the WDT by writing 1EH then E1H in sequence. . Figure 63. WDTRST Register 7 6 5 4 3 2 1 0 - - - - - S2 S1 S0 Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2S2 WatchDog Timer Duration selection bit 2 Work in conjunction with bit 1 and bit 0. 1S1 WatchDog Timer Duration selection bit 1 Work in conjunction with bit 2 and bit 0. 0S0 WatchDog Timer Duration selection bit 0 Work in conjunction with bit 1 and bit 2. 7 6 5 4 3 2 1 0 -------- Bit Number Bit Mnemonic Description 7- Watchdog Control Value |
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