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T89C51AC2-RLSI-M 数据表(PDF) 49 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 49 Page - ATMEL Corporation |
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49 / 117 page  Draft.A - March 30, 2001 49 Preview - Confidential T89C51AC2 10.6. XROW Bytes Table 18. Xrow mapping SBV register Software Boot Vector Default value after erasing chip: FFh NOTE: Only accessed by the API or in the parallel programming mode. Figure 30. SBV Register EB register EXTRA BYTE Default value after erasing chip: FFh NOTE: TOnly accessed by the API or in the parallel programming mode. Figure 31. EB Register Mnemonic Description Default value Address SBV Boot Vector Address F8h 01h SSB Software Security Byte FFh 05h EB Extra Byte FFh 06h Copy of the Manufacturer Code 58h 30h Copy of the Device ID#1: Family code D7h 31h Copy of the Device ID#2:Memories size and type F7h 60h Copy of the Device ID#3:Name and Revision FFh 61h 7 6 5 4 3 2 1 0 ADD 7 ADD 6 ADD 5 ADD 4 ADD 3 ADD 2 ADD 1 ADD 0 Bit Number Bit Mnemonic Description 7-0 ADD7:0 MSB of user boot loader address location 7 6 5 4 3 2 1 0 -------- Bit Number Bit Mnemonic Description 7-0 - User definition |
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