T89C51AC2-RLSI-M datasheet(104/117 Pages) ATMEL

104 / 117 page

104

Draft.A - March 30, 2001

Preview - Confidential

T89C51AC2

Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1 and 3. The noise is

due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst

cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.

Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temperature..

Under steady state (non-transient) conditions, IOL must be externally limited as follows:

Maximum IOL per port pin: 10 mA

Maximum IOL per 8-bit port:

Port 0: 26 mA

Ports 1, 2 and 3: 15 mA

Maximum total IOL for all output pins: 71 mA

If IOL exceeds the test condition, VOL may exceed the related speciﬁcation. Pins are not guaranteed to sink current greater than the listed test conditions.

Lower than standart C51 product independant from Vcc supply.

Figure 93. ICC Test Condition, Active Mode

Figure 94. ICC Test Condition, Idle Mode

VCC

ICC

(NC)

CLOCK

SIGNAL

VCC

All other pins are disconnected.

RST

XTAL2

XTAL1

VSS

VCC

RST

XTAL2

XTAL1

VSS

VCC

ICC

(NC)

VCC

All other pins are disconnected.

CLOCK

SIGNAL

T89C51AC2-RLSI-M 数据表(PDF) 104 Page - ATMEL Corporation

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