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T89C51AC2-RLSI-M 数据表(PDF) 114 Page - ATMEL Corporation |
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T89C51AC2-RLSI-M 数据表(HTML) 114 Page - ATMEL Corporation |
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114 / 117 page ![]() 114 Draft.A - March 30, 2001 Preview - Confidential T89C51AC2 18.4.10. External Clock Drive Waveforms 18.4.11. AC Testing Input/Output Waveforms AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at VIH min for a logic “1” and VIL max for a logic “0”. 18.4.12. Float Waveforms For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH ≥± 20mA. 18.4.13. Clock Waveforms Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2. VCC-0.5V 0.45V 0.7VCC 0.2VCC-0.1 TCHCL TCLCX TCLCL TCLCH TCHCX INPUT/OUTPUT 0.2 VCC + 0.9 0.2 VCC - 0.1 VCC -0.5 V 0.45 V FLOAT VOH - 0.1 V VOL + 0.1 V VLOAD VLOAD + 0.1 V VLOAD - 0.1 V |
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