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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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R8C/2G 数据表(PDF) 233 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 233 Page - Renesas Technology Corp |
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233 / 344 page  R8C/2G Group 18. Serial Interface Rev.1.00 Apr 04, 2008 Page 213 of 318 REJ09B0387-0100 18. Serial Interface The serial interface consists of two channels (UART0 or UART2). Each UARTi (i = 0 or 2) has an exclusive timer to generate the transfer clock and operates independently. Figure 18.1 shows a UARTi (i = 0 or 2) Block Diagram. Figure 18.2 shows a UARTi Transmit/Receive Unit. UARTi has two modes: clock synchronous serial I/O mode and clock asynchronous serial I/O mode (UART mode). Figures 18.3 to 18.5 show the Registers Associated with UARTi. Figure 18.1 UARTi (i = 0 or 2) Block Diagram = 01b f8 f1 = 10b CLK1 to CLK0 = 00b RXDi f32 1/16 1/16 1/2 1/(n0+1) UART reception UART transmission Clock synchronous type (when internal clock is selected) Clock synchronous type Reception control circuit Transmission control circuit CKDIR = 0 CKDIR = 1 Receive clock Transmit clock Transmit/ receive unit U0BRG register CKDIR = 0 Internal External CKDIR = 1 UARTi TXDi CLK polarity switch circuit CLKi Clock synchronous type Clock synchronous type (when external clock is selected) Clock synchronous type (when internal clock is selected) i = 0 or 2 CKDIR: Bit in UiMR register CLK0 to CLK1: Bits in UiC0 register |
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