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HD64F2149YV 数据表(PDF) 400 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 400 Page - Renesas Technology Corp |
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400 / 1075 page  Section 12 8-Bit Timers Rev. 3.00 Jan 18, 2006 page 372 of 1044 REJ09B0280-0300 φ TMRIX TICRR, TICRF read cycle T1 T2 Input capture signal Figure 12.10 Timing of Input Capture Signal (Input capture signal is input during TICRR and TICRF read) (2) Selection of the input capture signal input The input capture signal in TMRX is switched according to the setting of the bits in TCONRI register. Input capture signal selections are shown in figure 12.11 and table 12.3. For details, see section 13.2.1, Timer Connection Register I (TCONRI). TMIX pin TMRI1 pin TMCI1 pin Polarity inversion Polarity inversion Polarity inversion Signal selector TMRIX TMRX HFINV, HIINV SIMOD1, SIMOD0 ICST Figure 12.11 Input Capture Signal selections |
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