HD64F2149YV datasheet(460/1075 Pages) RENESAS

460 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 432 of 1044

REJ09B0280-0300

15.2.5

Serial Mode Register (SMR)

R/W

CHR

R/W

STOP

R/W

CKS0

R/W

CKS1

R/W

Bit

Initial value

Read/Write

SMR is an 8-bit register used to set the SCI’s serial transfer format and select the baud rate

generator clock source.

SMR can be read or written to by the CPU at all times.

SMR is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode, subsleep

mode, and module stop mode.

Bit 7—Communication Mode (C/

A): Selects asynchronous mode or synchronous mode as the

SCI operating mode.

Bit 7

Description

Asynchronous mode

(Initial value)

Synchronous mode

Bit 6—Character Length (CHR): Selects 7 or 8 bits as the data length in asynchronous mode. In

synchronous mode, a fixed data length of 8 bits is used regardless of the CHR setting.

Bit 6

CHR

Description

8-bit data

(Initial value)

7-bit data*

Note:

When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted, and LSB-

first/MSB-first selection is not available.

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