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HD64F2149YV 数据表(PDF) 885 Page - Renesas Technology Corp

部件名 HD64F2149YV
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD64F2149YV 数据表(HTML) 885 Page - Renesas Technology Corp

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Appendix A Instruction Set
Rev. 3.00 Jan 18, 2006 page 857 of 1044
REJ09B0280-0300
Instruction Mnemonic
Instruction
Fetch
I
Branch
Address
Read
J
Stack
Operation
K
Byte Data
Access
L
Word Data
Access
M
Internal
Operation
N
SUBS
SUBS #1/2/4,ERd
1
SUBX
SUBX #xx:8,Rd
1
SUBX Rs,Rd
1
TAS
TAS @ERd*
3
22
TRAPA
TRAPA #x:2
Normal
2
1
2/3 *
1
2
Advanced
2
2
2/3 *
1
2
XOR
XOR.B #xx:8,Rd
1
XOR.B Rs,Rd
1
XOR.W #xx:16,Rd
2
XOR.W Rs,Rd
1
XOR.L #xx:32,ERd
3
XOR.L ERs,ERd
2
XORC
XORC #xx:8,CCR
1
XORC #xx:8,EXR
2
Notes: 1. 2 when EXR is invalid, 3 when valid.
2. When n bytes of data are transferred.
3. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
4. Only registers ER0 to ER6 should be used when using the STM/LDM instruction.



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