HD64F2149YV datasheet(225/1075 Pages) RENESAS

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Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 197 of 1044

REJ09B0280-0300

Section 8 I/O Ports

8.1

Overview

The H8S/2149 has ten I/O ports (ports 1 to 6, 8, 9, A, and B), and one input-only port (port 7).

For additional ports C to G in H8S/2169, see section 8.13, Additional Overview for H8S/2169.

Tables 8.1 is a summary of the port functions. The pins of each port also have other functions.

Each port includes a data direction register (DDR) that controls input/output (not provided for the

input-only port) and data registers (DR, ODR) that store output data.

Ports 1 to 3, 6, A, and B have a built-in MOS input pull-up function. For ports A and B, the on/off

status of the MOS input pull-up is controlled by DDR and ODR. Ports 1 to 3 and 6 have a MOS

input pull-up control register (PCR), in addition to DDR and DR, to control the on/off status of the

MOS input pull-ups.

Ports 1 to 6, 8, 9, A, and B can drive a single TTL load and 30 pF capacitive load. All the I/O

ports can drive a Darlington transistor when in output mode. Ports 1 to 3 can drive an LED (10

mA sink current).

Port A input and output use by the VCCB power supply, which is independent of the V

CC power

supply. When the VCCB voltage is 5V, the pins on port A will be 5-V tolerant. PA4 to PA7 of

port A have bus-buffer drive capability. P52 in port 5 and P97 in port 9 are NMOS push-pull

outputs. P52 and P97 are thus 5-V tolerant, with DC characteristics that are dependent on the V

voltage.

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