数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

HD64F2149YV 数据表(PDF) 229 Page - Renesas Technology Corp

部件名 HD64F2149YV
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD64F2149YV 数据表(HTML) 229 Page - Renesas Technology Corp

Back Button HD64F2149YV Datasheet HTML 225Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 226Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 227Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 228Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 229Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 230Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 231Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 232Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 233Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 229 / 1075 page
background image
Section 8 I/O Ports
Rev. 3.00 Jan 18, 2006 page 201 of 1044
REJ09B0280-0300
Expanded Modes
Single-Chip Mode
Port
Description
Pins
Mode 1
Mode 2, Mode 3
(EXPE = 1)
Mode 2, Mode 3
(EXPE = 0)
Port 8 • 7-bit I/O
port
P86/
IRQ5/SCK1/
SCL1
P85/
IRQ4/RxD1
P84/
IRQ3/TxD1
P83/
LPCPD
P82/HIFSD/
CLKRUN
P81/
CS2/GA20
P80/HA0/
PME
I/O port also functioning as
external interrupt input (
IRQ5,
IRQ4, IRQ3), SCI1 input/
output (TxD1, RxD1, SCK1),
and I
2C bus interface 1
input/output (SCL1)
I/O port also functioning
as external interrupt
input (
IRQ5, IRQ4,
IRQ3), SCI1
input/output (TxD1,
RxD1, SCK1), host
interface (XBS) control
input/output (
CS2,
GA20, HA0, HIFSD),
host interface (LPC)
control input/output
(
LPCPD, CLKRUN,
GA20,
PME), and I2C
bus interface 1
input/output (SCL1)
Port 9 • 8-bit I/O
port
P97/
WAIT/SDA0 I/O port also functioning as
expanded data bus control
input (
WAIT) and I2C bus
interface 0 input/output (SDA0)
I/O port also functioning
as I
2C bus interface 0
input/output (SDA0)
P96/
φ/EXCL
When DDR
= 0: input
port or
EXCL input
When DDR
= 1 (after
reset):
φ
output
When DDR = 0 (after reset): input port or
EXCL input
When DDR = 1:
φ output
P95/
AS/IOS/CS1
P94/
HWR/IOW
P93/
RD/IOR
Expanded data bus control
output (
AS/IOS, HWR, RD)
I/O port also functioning
as host interface (XBS)
control input (
CS1, IOW,
IOR)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com