HD64F2149YV datasheet(233/1075 Pages) RENESAS

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Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 205 of 1044

REJ09B0280-0300

8.2.2

Table 8.2 shows the port 1 register configuration.

Table 8.2

Port 1 Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port 1 data direction register

P1DDR

H'00

H'FFB0

Port 1 data register

P1DR

R/W

H'00

H'FFB2

Port 1 MOS pull-up control

P1PCR

R/W

H'00

H'FFAC

Note:

Lower 16 bits of the address.

Port 1 Data Direction Register (P1DDR)

P17DDR

P16DDR

P15DDR

P14DDR

P13DDR

P10DDR

P12DDR

P11DDR

Bit

Initial value

Read/Write

P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port 1. P1DDR cannot be read; if it is, an undefined value will be returned.

P1DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode. The address output pins maintain their output state in a transition to

software standby mode.

• Mode 1

The corresponding port 1 pins are address outputs, regardless of the P1DDR setting.

In hardware standby mode, the address outputs go to the high-impedance state.

• Modes 2 and 3 (EXPE = 1)

The corresponding port 1 pins are address outputs or PWM outputs when P1DDR bits are set

to 1, and input ports when cleared to 0.

• Modes 2 and 3 (EXPE = 0)

The corresponding port 1 pins are output ports or PWM outputs when P1DDR bits are set to 1,

and input ports when cleared to 0.

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