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HD64F2149YV 数据表(PDF) 234 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 234 Page - Renesas Technology Corp |
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234 / 1075 page ![]() Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 206 of 1044 REJ09B0280-0300 Port 1 Data Register (P1DR) 7 P17DR 0 R/W 6 P16DR 0 R/W 5 P15DR 0 R/W 4 P14DR 0 R/W 3 P13DR 0 R/W 0 P10DR 0 R/W 2 P12DR 0 R/W 1 P11DR 0 R/W Bit Initial value R/W P1DR is an 8-bit readable/writable register that stores output data for the port 1 pins (P17 to P10). If a port 1 read is performed while P1DDR bits are set to 1, the P1DR values are read directly, regardless of the actual pin states. If a port 1 read is performed while P1DDR bits are cleared to 0, the pin states are read. P1DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in software standby mode. Port 1 MOS Pull-Up Control Register (P1PCR) 7 P17PCR 0 R/W 6 P16PCR 0 R/W 5 P15PCR 0 R/W 4 P14PCR 0 R/W 3 P13PCR 0 R/W 0 P10PCR 0 R/W 2 P12PCR 0 R/W 1 P11PCR 0 R/W Bit Initial value R/W P1PCR is an 8-bit readable/writable register that controls the port 1 built-in MOS input pull-ups on a bit-by-bit basis. In modes 2 and 3, the MOS input pull-up is turned on when a P1PCR bit is set to 1 while the corresponding P1DDR bit is cleared to 0 (input port setting). P1PCR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in software standby mode. |
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