HD64F2149YV datasheet(240/1075 Pages) RENESAS

240 / 1075 page

Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 212 of 1044

REJ09B0280-0300

• Modes 2 and 3 (EXPE = 0)

The corresponding port 2 pins are output ports or PWM outputs when P2DDR bits are set to 1,

and input ports when cleared to 0.

P27 can be used as an on-chip supporting module output pin regardless of the P27DDR setting.

Port 2 Data Register (P2DR)

P27DR

R/W

P26DR

R/W

P25DR

R/W

P24DR

R/W

P23DR

R/W

P20DR

R/W

P22DR

R/W

P21DR

R/W

Bit

Initial value

R/W

P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P27 to P20).

If a port 2 read is performed while P2DDR bits are set to 1, the P2DR values are read directly,

regardless of the actual pin states. If a port 2 read is performed while P2DDR bits are cleared to 0,

the pin states are read.

P2DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

Port 2 MOS Pull-Up Control Register (P2PCR)

P27PCR

R/W

P26PCR

R/W

P25PCR

R/W

P24PCR

R/W

P23PCR

R/W

P20PCR

R/W

P22PCR

R/W

P21PCR

R/W

Bit

Initial value

R/W

P2PCR is an 8-bit readable/writable register that controls the port 2 built-in MOS input pull-ups

on a bit-by-bit basis.

In modes 2 and 3, the MOS input pull-up is turned on when a P2PCR bit is set to 1 while the

corresponding P2DDR bit is cleared to 0 (input port setting).

P2PCR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

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