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HD64F2149YV 数据表(PDF) 267 Page - Renesas Technology Corp

部件名 HD64F2149YV
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD64F2149YV 数据表(HTML) 267 Page - Renesas Technology Corp

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Section 8 I/O Ports
Rev. 3.00 Jan 18, 2006 page 239 of 1044
REJ09B0280-0300
Port 8 Data Direction Register (P8DDR)
Bit
7
6
543210
P86DDR P85DDR P84DDR P83DDR P82DDR P81DDR P80DDR
Initial value
1
0
000000
Read/Write
W
WWWWWW
P8DDR is a 7-bit write-only register, the individual bits of which specify input or output for the
pins of port 8. P8DDR has the same address as PBPIN, and if read, the port B state will be
returned.
Setting a P8DDR bit to 1 makes the corresponding port 8 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P8DDR is initialized to H'80 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port 8 Data Register (P8DR)
Bit
7
6
543210
P86DR
P85DR
P84DR
P83DR
P82DR
P81DR
P80DR
Initial value
1
0
000000
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
P8DR is a 7-bit readable/writable register that stores output data for the port 8 pins (P86 to P80). If
a port 8 read is performed while P8DDR bits are set to 1, the P8DR values are read directly,
regardless of the actual pin states. If a port 8 read is performed while P8DDR bits are cleared to 0,
the pin states are read.
P8DR is initialized to H'80 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.



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