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HD64F2149YV 数据表(PDF) 269 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 269 Page - Renesas Technology Corp |
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269 / 1075 page ![]() Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 241 of 1044 REJ09B0280-0300 Pin Selection Method and Pin Functions P84/ IRQ3/TxD1 The pin function is switched as shown below according to the combination of bit TE in SCR of SCI1 and bit P84DDR. TE 0 1 P84DDR 0 1 — Pin function P84 input pin P84 output pin TxD1 output pin IRQ3 input pin When the IRQ3E bit in IER is set to 1, this pin is used as the IRQ3 input pin. P83/ LPCPD The pin function is switched as shown below according to bit P83DDR. P83DDR 0 1 Pin function P83 input pin P83 output pin LPCPD input pin When at least one of bits LPC3E to LPC1E is set to 1 in HICR0, this pin is used as the LPCPD input pin. The LPCPD input pin can only be used in mode 2 or 3 (EXPE = 0). P82/HIFSD/ CLKRUN The pin function is switched as shown below according to the combination of bits HI12E and SDE in SYSCR2, bits LPC3E to LPC1E in HICR0, and bit P82DDR. LPC3E to LPC1E All 0 Not all 0 HI12E 0 1 —* SDE — 01 — P82DDR 0101 ——* Pin function P82 input pin P82 output pin P82 input pin P82 output pin HIFSD input pin CLKRUN I/O pin Note: * When at least one of bits LPC3E to LPC1E is set to 1, bits HI12E and P82DDR should be cleared to 0. The HIFSD input pin and CLKRUN I/O pin can only be used in mode 2 or 3 (EXPE = 0). |
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