HD64F2149YV datasheet(301/1075 Pages) RENESAS

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Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 273 of 1044

REJ09B0280-0300

8.15.2

Table 8.29 is a summary of the port E and port F registers.

Table 8.29

Port E and port F Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port E data direction register

PEDDR

H'00

H'FE4A*

Port E output data register

PEODR

R/W

H'00

H'FE48

Port E input data register

PEPIN

Undefined

H'FE4A*

Port E Nch-OD control register

PENOCR

R/W

H'00

H'FE18

Port F data direction register

PFDDR

H'00

H'FE4B*

Port F output data register

PFODR

R/W

H'00

H'FE49

Port F input data register

PFPIN

Undefined

H'FE4B*

Port F Nch-OD control register

PFNOCR

R/W

H'00

H'FE19

Notes: 1. Lower 16 bits of the address.

2. PEDDR has the same address as PEPIN.

3. PFDDR has the same address as PFPIN.

Port E and port F Data Direction Registers (PEDDR, PFDDR)

Bit

6543

210

PE7DDR PE6DDR PE5DDR PE4DDR PE3DDR PE2DDR PE1DDR PE0DDR

Initial value

0000

000

Read/Write

WWWW

WWW

Bit

6543

210

PF7DDR PF6DDR PF5DDR PF4DDR PF3DDR PF2DDR PF1DDR PF0DDR

Initial value

0000

000

Read/Write

WWWW

WWW

PEDDR and PFDDR are 8-bit write-only registers, the individual bits of which select input or

output for the pins of port E and port F. PEDDR and PFDDR are at the same addresses as PEPIN

and PFPIN, respectively, and if read, will return the port E and port F pin states.

Setting a PEDDR or PFDDR bit to 1 makes the corresponding pin on port E or port F an output

pin, while clearing the bit to 0 makes the pin an input pin.

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