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HD64F2149YV 数据表(PDF) 298 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 298 Page - Renesas Technology Corp |
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298 / 1075 page ![]() Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 270 of 1044 REJ09B0280-0300 PCPIN and PDPIN are at the same addresses as PCDDR and PDDDR, respectively. Writing is to PCDDR or PDDDR and the port C or port D settings will change unless the given byte represents the current setting. Port C and port D Nch-OD Control Register (PCNOCR, PDNOCR) Bit 7 6543 210 PC7NOC PC6NOC PC5NOC PC4NOC PC3NOC PC2NOC PC1NOC PC0NOC Initial value 0 0000 000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Bit 7 6543 210 PD7NOC PD6NOC PD5NOC PD4NOC PD3NOC PD2NOC PD1NOC PD0NOC Initial value 0 0000 000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W PCNOCR and PDNOCR are 8-bit read/write registers, the individual bits of which specify the output driver type for pins on ports C and D which are configured as outputs. Setting a PCNOCR or PDNOCR bit to 1 disables the P-channel driver for the corresponding pin on port C or port D. Clearing the bit to 0 enables the P-channel driver for the pin. Although the P-channel drivers are always connected, the output driver type will be CMOS when the bit is cleared to 0 and N-channel open-drain when it is set to 1. PCNOCR and PDNOCR are initialized to H'00 by a reset and in hardware standby mode. They retain their prior states in software standby mode. DDR 0 1 NOCR — 01 ODR 0 1 010 1 N-ch. driver OFF ON OFF ON OFF P-ch. driver OFF OFF ON OFF MOS Input Pul-Up OFF ON OFF |
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