ADE7880 datasheet(53/104 Pages) AD

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Data Sheet

ADE7880

Rev. A | Page 53 of 104

ZERO-

CROSSING

DETECTION

(PHASE A)

ZERO-

CROSSING

DETECTION

(PHASE B)

CALIBRATION

CONTROL

ZERO-

CROSSING

DETECTION

(PHASE C)

LINECYC[15:0]

AFVARHR[31:0]

ZXSEL[0] IN

LCYCMODE[7:0]

ZXSEL[1] IN

LCYCMODE[7:0]

ZXSEL[2] IN

LCYCMODE[7:0]

OUTPUT FROM

FUNDAMENTAL REACTIVE

POWER ALGORITHM

APGAIN

AFVAROS

INTERNAL

ACCUMULATOR

THRESHOLD

32-BIT

VARTHR

27 26

Figure 78. Line Cycle Fundamental Reactive Energy Accumulation Mode

Phase A, Phase B, and Phase C zero crossings are, respectively,

included when counting the number of half line cycles by

setting Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any

combination of the zero crossings from all three phases can be

used for counting the zero crossing. Select only one phase at a

time for inclusion in the zero-crossings count during calibration.

For details on setting the LINECYC register and the Bit 5

(LENERGY) in the MASK0 interrupt mask register associated

with the line cycle accumulation mode, see the Line Cycle

Active Energy Accumulation Mode section.

APPARENT POWER CALCULATION

Apparent power is defined as the maximum active power that

can be delivered to a load. One way to obtain the apparent

power is by multiplying the voltage rms value by the current

rms value (also called the arithmetic apparent power).

S = V rms × I rms

(40)

where:

S is the apparent power.

V rms and I rms are the rms voltage and current, respectively.

The ADE7880 computes the arithmetic apparent power on each

phase. Figure 79 illustrates the signal processing in each phase

for the calculation of the apparent power in the ADE7880.

Because V rms and I rms contain all harmonic information, the

apparent power computed by the ADE7880 is total apparent

power. The ADE7880 computes fundamental and harmonic

apparent powers determined by the fundamental and harmonic

components of the voltages and currents. See the Harmonics

Calculations section for details.

The ADE7880 stores the instantaneous phase apparent powers

into the AVA, BVA, and CVA registers. Their equation is

PMAX

xVA

(41)

where:

U, I are the rms values of the phase voltage and current.

UFS, IFS are the rms values of the phase voltage and current when

the ADC inputs are at full scale.

PMAX = 27,059,678, the instantaneous power computed when

the ADC inputs are at full scale and in phase.

The xVA[23:0] waveform registers may be accessed using

various serial ports. Refer to the Waveform Sampling Mode

section for more details.

The ADE7880 can compute the apparent power in an alternative

way by multiplying the phase rms current by an rms voltage

introduced externally. See the Apparent Power Calculation

Using VNOM section for details.

INTERNAL

ACCUMULATOR

THRESHOLD

DIGITAL SIGNAL

PROCESSOR

APGAIN

AVA

VATHR

27 26

32-BIT REGISTER

AVAHR[31:0]

AIRMS

AVRMS

Figure 79. Apparent Power Data Flow and Apparent Energy Accumulation

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