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ADE7880 数据表(PDF) 85 Page - Analog Devices |
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ADE7880 数据表(HTML) 85 Page - Analog Devices |
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85 / 104 page  Data Sheet ADE7880 Rev. A | Page 85 of 104 Table 32. Billable Registers Address Register Name R/W1, 2 Bit Length2 Bit Length During Communication2 Type2, 3 Default Value Description 0xE400 AWATTHR R 32 32 S 0x00000000 Phase A total active energy accumulation. 0xE401 BWATTHR R 32 32 S 0x00000000 Phase B total active energy accumulation. 0xE402 CWATTHR R 32 32 S 0x00000000 Phase C total active energy accumulation. 0xE403 AFWATTHR R 32 32 S 0x00000000 Phase A fundamental active energy accumulation. 0xE404 BFWATTHR R 32 32 S 0x00000000 Phase B fundamental active energy accumulation. 0xE405 CFWATTHR R 32 32 S 0x00000000 Phase C fundamental active energy accumulation. 0xE406 to 0xE408 Reserved R 32 32 S 0x00000000 0xE409 AFVARHR R 32 32 S 0x00000000 Phase A fundamental reactive energy accumulation. 0xE40A BFVARHR R 32 32 S 0x00000000 Phase B fundamental reactive energy accumulation. 0xE40B CFVARHR R 32 32 S 0x00000000 Phase C fundamental reactive energy accumulation. 0xE40C AVAHR R 32 32 S 0x00000000 Phase A apparent energy accumulation. 0xE40D BVAHR R 32 32 S 0x00000000 Phase B apparent energy accumulation. 0xE40E CVAHR R 32 32 S 0x00000000 Phase C apparent energy accumulation. 1 R is read, and W is write. 2 N/A is not applicable. 3 U is unsigned register, and S is signed register in twos complement format. Table 33. Configuration and Power Quality Registers Address Register Name R/W1 Bit Length Bit Length During Communication2 Type3 Default Value4 Description 0xE500 IPEAK R 32 32 U N/A Current peak register. See Figure 58 and Table 34 for details about its composition. 0xE501 VPEAK R 32 32 U N/A Voltage peak register. See Figure 58 and Table 35 for details about its composition. 0xE502 STATUS0 R/W 32 32 U N/A Interrupt Status Register 0. See Table 36. 0xE503 STATUS1 R/W 32 32 U N/A Interrupt Status Register 1. See Table 37. 0xE504 AIMAV R 20 32 ZP U N/A Phase A current mean absolute value computed during PSM0 and PSM1 modes. 0xE505 BIMAV R 20 32 ZP U N/A Phase B current mean absolute value computed during PSM0 and PSM1 modes. 0xE506 CIMAV R 20 32 ZP U N/A Phase C current mean absolute value computed during PSM0 and PSM1 modes. 0xE507 OILVL R/W 24 32 ZP U 0xFFFFFF Overcurrent threshold. 0xE508 OVLVL R/W 24 32 ZP U 0xFFFFFF Overvoltage threshold. 0xE509 SAGLVL R/W 24 32 ZP U 0x000000 Voltage SAG level threshold. 0xE50A MASK0 R/W 32 32 U 0x00000000 Interrupt Enable Register 0. See Table 38. 0xE50B MASK1 R/W 32 32 U 0x00000000 Interrupt Enable Register 1. See Table 39. 0xE50C IAWV R 24 32 SE S N/A Instantaneous value of Phase A current. 0xE50D IBWV R 24 32 SE S N/A Instantaneous value of Phase B current. 0xE50E ICWV R 24 32 SE S N/A Instantaneous value of Phase C current. |
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