ADE7880 datasheet(28/104 Pages) AD

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ADE7880

Data Sheet

Rev. A | Page 28 of 104

Current Channel Sampling

The waveform samples of the current channel are taken at the

output of HPF and stored in the 24-bit signed registers, IAWV,

IBWV, ICWV, and INWV at a rate of 8 kSPS. All power and rms

calculations remain uninterrupted during this process. Bit 17

(DREADY) in the STATUS0 register is set when the IAWV, IBWV,

ICWV, and INWV registers are available to be read using the I2C

or SPI serial port. Setting Bit 17 (DREADY) in the MASK0

set. See the Digital Signal Processor section for more details on

Bit DREADY.

As stated in the Current Waveform Gain Registers section, the

serial ports of the ADE7880 work on 32-, 16-, or 8-bit words.

When the IAWV, IBWV, ICWV, and INWV 24-bit signed

registers are read from the ADE7880, they are transmitted sign

extended to 32 bits. See Figure 44 for details.

24 23 22

24-BIT SIGNED NUMBER

BITS[31:24] ARE

EQUAL TO BIT 23

BIT 23 IS A SIGN BIT

Figure 44. 24-Bit IxWV Register Transmitted as 32-Bit Signed Word

The ADE7880 contains a high speed data capture (HSDC) port

that is specially designed to provide fast access to the waveform

sample registers. See the HSDC Interface section for more details.

di/dt CURRENT SENSOR AND DIGITAL INTEGRATOR

The di/dt sensor detects changes in the magnetic field caused by

the ac current. Figure 45 shows the principle of a di/dt current

sensor.

MAGNETIC FIELD CREATED BY CURRENT

(DIRECTLY PROPORTIONAL TO CURRENT)

+ EMF (ELECTROMOTIVE FORCE)

– INDUCED BY CHANGES IN

MAGNETIC FLUX DENSITY (di/dt)

Figure 45. Principle of a di/dt Current Sensor

The flux density of a magnetic field induced by a current is

directly proportional to the magnitude of the current. The

changes in the magnetic flux density passing through a conductor

loop generate an electromotive force (EMF) between the two

ends of the loop. The EMF is a voltage signal that is propor-

tional to the di/dt of the current. The voltage output from the

di/dt current sensor is determined by the mutual inductance

between the current carrying conductor and the di/dt sensor.

Due to the di/dt sensor, the current signal needs to be filtered

before it can be used for power measurement. On each phase and

neutral current datapath, there are built-in digital integrators to

recover the current signal from the di/dt sensor. The digital

integrators placed on the phase currents data paths are independent

of the digital integrator placed in the neutral current data path. This

allows for using a different current sensor to measure the neutral

current (for example a current transformer) from the current

sensors used to measure the phase currents (for example di/dt

sensors). The digital integrators are managed by Bit 0 (INTEN) of

the CONFIG register and by Bit 3 (ININTEN) of the CONFIG3

integrators in the phase current channels. Bit 3 (ININTEN) of the

CONFIG3 register manages the integrator in the neutral current

channel. When the INTEN bit is 0 (default), all integrators in the

phase current channels are disabled. When INTEN bit is 1, the

integrators in the phase currents datapaths are enabled. When the

ININTEN bit is 0 (default), the integrator in the neutral current

channel is disabled. When the ININTEN bit is 1, the integrator in

the neutral current channel is enabled.

Figure 46 and Figure 47 show the magnitude and phase

response of the digital integrator.

Note that the integrator has a −20 dB/dec attenuation and

approximately −90° phase shift. When combined with a di/dt

sensor, the resulting magnitude and phase response should be a

flat gain over the frequency band of interest. However, the di/dt

sensor has a 20 dB/dec gain associated with it and generates sig-

nificant high frequency noise. At least a second order antialiasing

filter is needed to avoid noise aliasing back in the band of

interest when the ADC is sampling (see the Antialiasing Filter

section).

–50

–100

–50

500

1000

1500

2000

2500

3000

3500

4000

FREQUENCY (Hz)

0.01

0.1

100

1000

FREQUENCY (Hz)

Figure 46. Combined Gain and Phase Response of the

Digital Integrator

The DICOEFF 24-bit signed register is used in the digital

integrator algorithm. At power-up or after a reset, its value is

0x000000. Before turning on the integrator, this register must be

initialized with 0xFFF8000. DICOEFF is not used when the

integrator is turned off and can remain at 0x000000 in that case.

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