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ADE7932 数据表(PDF) 54 Page - Analog Devices |
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ADE7932 数据表(HTML) 54 Page - Analog Devices |
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54 / 120 page ![]() ADE7978/ADE7933/ADE7932 Data Sheet Rev. 0 | Page 54 of 120 ACTIVE POWER OFFSET CALIBRATION The ADE7978 includes a 24-bit watt offset register for each phase and each active power. The AWATTOS, BWATTOS, and CWATTOS registers (Address 0x439C to Address 0x439E) compen- sate offsets in the total active power calculations. The AFWATTOS, BFWATTOS, and CFWATTOS registers (Address 0x43A3 to Address 0x43A5) compensate offsets in the fundamental active power calculations. These signed twos complement registers are used to remove offsets in the active power calculations. An offset can exist in the power calculation due to crosstalk between channels on the PCB or in the chip itself. One LSB in the active power offset register is equivalent to 1 LSB in the active power multiplier output. With full-scale current and voltage inputs, the LPF2 output is PMAX = 26,991,271. At −80 dB down from full scale (active power scaled down 104 times), one LSB of the active power offset register represents 0.037% of PMAX. The serial ports of the ADE7978 work with 32-, 16-, or 8-bit words, whereas the DSP works with 28-bit words. Like the xIGAIN registers shown in Figure 44, the 24-bit xWATTOS and xFWATTOS registers are sign extended to 28 bits and padded with four 0s for transmission as 32-bit registers. SIGN OF ACTIVE POWER CALCULATION The average active power is a signed calculation. If the phase difference between the current and voltage waveforms is more than 90°, the average power becomes negative. Negative power indicates that energy is being injected back onto the grid. The ADE7978 has sign detection circuitry for active power calcula- tions; this circuitry can monitor the total active powers or the fundamental active powers. As described in the Active Energy Calculation section, the active energy accumulation is performed in two stages. Each time a sign change is detected in the energy accumulation at the end of the first stage—that is, after the energy accumulated in the internal accumulator reaches the WTHR register threshold—a dedicated interrupt is triggered. The sign of each phase active power can be read in the PHSIGN register (Address 0xE617). Bit 0 (REVAPSEL) in the MMODE register (Address 0xE700) specifies the type of active power that is monitored. When REVAPSEL is cleared to 0 (the default value), the total active power is monitored. When REVAPSEL is set to 1, the funda- mental active power is monitored. Bits[8:6] (REVAPC, REVAPB, and REVAPA) in the STATUS0 register (Address 0xE502) are set when a sign change occurs in the power selected by Bit 0 (REVAPSEL) in the MMODE register. Bits[2:0] (CWSIGN, BWSIGN, and AWSIGN) in the PHSIGN register are set simultaneously with the REVAPC, REVAPB, and REVAPA bits in the STATUS0 register. The xWSIGN bits indicate the sign of the power. When these bits are set to 0, the corresponding power is positive. When the bits are set to 1, the corresponding power is negative. The REVAPx bits in the STATUS0 register and the xWSIGN bits in the PHSIGN register refer to the total active power of Phase x and the power type selected by Bit 0 (REVAPSEL) in the MMODE register. Interrupts attached to Bits[8:6] (REVAPC, REVAPB, and REVAPA) in the STATUS0 register can be enabled by setting Bits[8:6] in the MASK0 register. When enabled, the IRQ0 pin goes low and the status bit is set to 1 when a change of sign occurs. To identify the phase that triggered the interrupt, read the PHSIGN register immediately after reading the STATUS0 register. The status bit is cleared and the IRQ0 pin is returned high by writing a 1 to the appropriate bits in the STATUS0 register. ACTIVE ENERGY CALCULATION Active energy is defined as the integral of active power. Energy = ∫ dt p(t) (30) The ADE7978 achieves the integration of the active power signal in two stages (see Figure 76). The process is identical for total active power and fundamental active power. The first stage accumulates the instantaneous phase total or fundamental active power at 1.024 MHz (the DSP computes these values at an 8 kHz rate). Each time a threshold is reached, a pulse is generated, and the threshold is subtracted from the internal register. The sign of the energy at this moment is considered the sign of the active power (see the Sign of Active Power Calculation section for more information). INTERNAL ACCUMULATOR WATTACC BITS IN ACCMODE[7:0] THRESHOLD WTHR 34 27 26 0 0 32-BIT REGISTER AWATTHR[31:0] REVAPA BIT IN STATUS0[31:0] INSTANTANEOUS PHASE A ACTIVE POWER COMPUTED IN DIGITAL SIGNAL PROCESSOR Figure 76. Total Active Energy Accumulation |
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