ADE7932 datasheet(92/120 Pages) AD

92 / 120 page

ADE7978/ADE7933/ADE7932

Data Sheet

Rev. 0 | Page 92 of 120

I2C Write Operation

A write operation using the I2C interface of the ADE7978 is

initiated when the master generates a start condition, which

consists of one byte representing the slave address of the

ADE7978 followed by the 16-bit address of the target register

and by the value of the register (see Figure 116). The addresses

and the register contents are sent with the most significant bit

first.

The most significant seven bits of the address byte contain the

address of the ADE7978, which is equal to 0111000. Bit 0 of the

address byte is the read/write bit. For a write operation, Bit 0 must

be cleared to 0; therefore, the first byte of the write operation is

0x70. The ADE7978 acknowledges each byte received. Registers

can have 8, 16, or 32 bits; after the last bit of the register is trans-

mitted and the ADE7978 acknowledges the transfer, the master

generates a stop condition.

I2C Read Operation

A read operation using the I2C interface of the ADE7978 is

accomplished in two stages. The first stage sets the pointer to

the address of the register. The second stage reads the contents

of the register.

As shown in Figure 117, the first stage begins when the master

generates a start condition, which consists of one byte representing

the slave address of the ADE7978 followed by the 16-bit address

of the target register. The ADE7978 acknowledges each byte

received. The address byte is similar to the address byte for a

write operation and is equal to 0x70 (see the I2C Write Operation

section).

After the last byte of the register address is sent and acknowledged

by the ADE7978, the second stage begins with the master generat-

ing a new start condition followed by the address byte. The most

significant seven bits of this address byte contain the address of

the ADE7978, which is equal to 0111000. Bit 0 of the address byte

is the read/write bit. For a read operation, Bit 0 must be set to 1;

therefore, the first byte of the read operation is 0x71. After this

byte is received, the ADE7978 generates an acknowledge. The

ADE7978 then sends the value of the register, and, after each byte

is received, the master generates an acknowledge. All bytes are

sent with the most significant bit first. Registers can have 8, 16,

or 32 bits; after the last bit of the register is received, the master

does not acknowledge the transfer but generates a stop condition.

ACK GENERATED

BY ADE7978

SLAVE ADDRESS

MOST SIGNIFICANT

8 BITS OF REGISTER

ADDRESS

LEAST SIGNIFICANT

8 BITS OF REGISTER

ADDRESS

BYTE 3 (MOST

SIGNIFICANT)

OF REGISTER

BYTE 2 OF REGISTER

BYTE 1 OF REGISTER

BYTE 0 (LEAST

SIGNIFICANT) OF

111 0000

Figure 116. I2C Write Operation of a 32-Bit Register

ACK GENERATED

BY ADE7978

ACK

GENERATED BY

MASTER

SLAVE ADDRESS

MOST SIGNIFICANT

8 BITS OF REGISTER

ADDRESS

LEAST SIGNIFICANT

8 BITS OF REGISTER

ADDRESS

1 110000

SLAVE ADDRESS

BYTE 3

(MOST SIGNIFICANT)

OF REGISTER

BYTE 2 OF

BYTE 1 OF

BYTE 0

(LEAST SIGNIFICANT)

OF REGISTER

111000 1

ACK GENERATED

BY ADE7978

Figure 117. I2C Read Operation of a 32-Bit Register

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