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ADE7932 数据表(PDF) 61 Page - Analog Devices

部件名 ADE7932
功能描述  Isolated Energy Metering Chipset for Polyphase Shunt Meters
PDF  120 Pages
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ADE7932 数据表(HTML) 61 Page - Analog Devices

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Data Sheet
ADE7978/ADE7933/ADE7932
Rev. 0 | Page 61 of 120
ENERGY ACCUMULATION MODES
The reactive power is accumulated in each 32-bit var-hour accu-
mulation register (AVARHR, BVARHR, CVARHR, AFVARHR,
BFVARHR, and CFVARHR) according to the configuration of
Bits[5:4] (CONSEL[1:0] bits) in the ACCMODE register (see
Table 25). Note that IA’, IB’, and IC’ are the phase-shifted current
waveforms.
Table 25. Inputs to Var-Hour Accumulation Registers
CONSEL[1:0]
AVARHR,
AFVARHR
BVARHR,
BFVARHR
CVARHR,
CFVARHR
00
VA × IA’
VB × IB’
VC × IC’
01
VA × IA’
VB × IB’
VC × IC’
VB = VA − VC1
10
Reserved
11
VA × IA’
VB × IB’
VC × IC’
VB = −VA
1
See the BWATTHR and BFWATTHR Accumulation Register in 3-Phase, 3-Wire
Configurations section.
Bits[3:2] (VARACC[1:0]) in the ACCMODE register determine
how the reactive power is accumulated in the var-hour registers
and how the CF frequency output can be generated as a function
of total and fundamental active and reactive powers. For more
information, see the Energy-to-Frequency Conversion section.
BWATTHR and BFWATTHR Accumulation Register in
3-Phase, 3-Wire Configurations
In a 3-phase, 3-wire configuration (CONSEL[1:0] = 01), the
ADE7978 computes the rms value of the line voltage between
Phase A and Phase C and stores the result in the BVRMS register
(see the Voltage RMS in Delta Configurations section). The
Phase B current value provided after the HPF is 0; therefore, the
powers associated with Phase B are 0.
To avoid any errors in the frequency output pins (CF1, CF2, or
CF3) related to the powers associated with Phase B, disable the
contribution of Phase B to the energy-to-frequency converters
by setting the TERMSEL1[1], TERMSEL2[1], or TERMSEL3[1]
bit to 0 in the COMPMODE register (Address 0xE60E). For more
information, see the Energy-to-Frequency Conversion section.
LINE CYCLE REACTIVE ENERGY ACCUMULATION
MODE
In line cycle energy accumulation mode, the energy accumulation
is synchronized to the voltage channel zero crossings such that
reactive energy is accumulated over an integral number of half
line cycles. The advantage of summing the reactive energy over
an integer number of line cycles is that the sinusoidal component
in the reactive energy is reduced to 0. This eliminates any ripple
in the energy calculation and allows the energy to be accumulated
accurately over a shorter time. The line cycle energy accumulation
mode greatly simplifies the energy calibration and significantly
reduces the time required to calibrate the meter.
In line cycle energy accumulation mode, the ADE7978 transfers
the reactive energy accumulated in the 32-bit internal accumula-
tion registers to the xVARHR or xFVARHR registers after an
integral number of line cycles (see Figure 80). The number of half
line cycles is specified in the LINECYC register (Address 0xE60C).
ZERO-
CROSSING
DETECTION
(PHASE A)
ZERO-
CROSSING
DETECTION
(PHASE B)
CALIBRATION
CONTROL
ZERO-
CROSSING
DETECTION
(PHASE C)
LINECYC[15:0]
AVARHR[31:0]
ZXSEL[0] IN
LCYCMODE[7:0]
ZXSEL[1] IN
LCYCMODE[7:0]
ZXSEL[2] IN
LCYCMODE[7:0]
OUTPUT FROM
TOTAL REACTIVE
POWER ALGORITHM
APGAIN
AVAROS
INTERNAL
ACCUMULATOR
THRESHOLD
32-BIT
REGISTER
VARTHR
34
27 26
0
0
Figure 80. Line Cycle Total Reactive Energy Accumulation Mode
The line cycle reactive energy accumulation mode is activated by
setting Bit 1 (LVAR) in the LCYCMODE register (Address 0xE702).
The total reactive energy accumulated over an integer number
of half line cycles (or zero crossings) is written to the var-hour
accumulation registers after the number of half line cycles spec-
ified by the LINECYC register is detected. When using the line
cycle accumulation mode, set Bit 6 (RSTREAD) of the LCYCMODE
register to Logic 0 because a read with reset of the var-hour registers
outside the LINECYC period resets the energy accumulation.
Phase A, Phase B, and Phase C zero crossings are included
when counting the number of half line cycles by setting
Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any combi-
nation of zero crossings from all three phases can be used to
count the zero crossings. Select only one phase at a time for
inclusion in the count of zero crossings during calibration.
For more information about setting the LINECYC register and
Bit 5 (LENERGY) in the MASK0 register associated with the
line cycle accumulation mode, see the Line Cycle Active Energy
Accumulation Mode section.



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