ADE7932 datasheet(56/120 Pages) AD

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ADE7978/ADE7933/ADE7932

Data Sheet

Rev. 0 | Page 56 of 120

ENERGY ACCUMULATION MODES

The active power is accumulated in each 32-bit watthour

accumulation register (AWATTHR, BWATTHR, CWATTHR,

AFWATTHR, BFWATTHR, and CFWATTHR) according to

the configuration of Bits[5:4] (CONSEL[1:0] bits) in the

ACCMODE register (see Table 21).

Table 21. Inputs to Watthour Accumulation Registers

CONSEL[1:0]

AWATTHR

AFWATTHR

BWATTHR

BFWATTHR

CWATTHR

CFWATTHR

VA × IA

VB × IB

VC × IC

VA × IA

VB × IB

VC × IC

VB = VA − VC1

Reserved

VA × IA

VB × IB

VC × IC

VB = −VA

See the BWATTHR and BFWATTHR Accumulation Register in 3-Phase, 3-Wire

Configurations section.

Depending on the polyphase meter service, choose the appro-

priate formula to calculate the active energy. The ANSI C12.10

standard defines the different configurations of the meter.

Table 22 describes which mode to choose in these various

configurations.

Table 22. Meter Form Configuration

ANSI Meter

Form

Configuration

CONSEL[1:0]

Bits

Figure

5S/13S

3-wire delta

Figure 105

8S/15S

4-wire delta

Figure 106

9S/16S

4-wire wye

Figure 103

Bits[1:0] (WATTACC[1:0]) in the ACCMODE register

determine how the active power is accumulated in the watthour

registers and how the CF frequency output can be generated as

a function of the total and fundamental active powers. For more

information, see the Energy-to-Frequency Conversion section.

BWATTHR and BFWATTHR Accumulation Register in

3-Phase, 3-Wire Configurations

In a 3-phase, 3-wire configuration (CONSEL[1:0] = 01), the

ADE7978 computes the rms value of the line voltage between

Phase A and Phase C and stores the result in the BVRMS register

(see the Voltage RMS in Delta Configurations section). The

Phase B current value provided after the HPF is 0; therefore,

the powers associated with Phase B are 0.

To avoid any errors in the frequency output pins (CF1, CF2, or

CF3) related to the powers associated with Phase B, disable the

contribution of Phase B to the energy-to-frequency converters

by setting the TERMSEL1[1], TERMSEL2[1], or TERMSEL3[1]

bit to 0 in the COMPMODE register (Address 0xE60E). For more

information, see the Energy-to-Frequency Conversion section.

LINE CYCLE ACTIVE ENERGY ACCUMULATION

MODE

In line cycle energy accumulation mode, the energy accumulation

is synchronized to the voltage channel zero crossings such that

active energy is accumulated over an integral number of half line

cycles. The advantage of summing the active energy over an integer

number of line cycles is that the sinusoidal component in the active

energy is reduced to 0. This eliminates any ripple in the energy

calculation and allows the energy to be accumulated accurately

over a shorter time. The line cycle energy accumulation mode

greatly simplifies the energy calibration and significantly reduces

the time required to calibrate the meter.

In line cycle energy accumulation mode, the ADE7978 transfers

the active energy accumulated in the 32-bit internal accumulation

registers to the xWATTHR or xFWATTHR registers after an

integral number of line cycles (see Figure 78). The number of half

line cycles is specified in the LINECYC register (Address 0xE60C).

ZERO-

CROSSING

DETECTION

(PHASE A)

ZERO-

CROSSING

DETECTION

(PHASE B)

CALIBRATION

CONTROL

ZERO-

CROSSING

DETECTION

(PHASE C)

LINECYC[15:0]

AWATTHR[31:0]

ZXSEL[0] IN

LCYCMODE[7:0]

ZXSEL[1] IN

LCYCMODE[7:0]

ZXSEL[2] IN

LCYCMODE[7:0]

OUTPUT

FROM

LPF2

APGAIN

AWATTOS

INTERNAL

ACCUMULATOR

THRESHOLD

32-BIT

WTHR

27 26

Figure 78. Line Cycle Active Energy Accumulation Mode

The line cycle active energy accumulation mode is activated by set-

ting Bit 0 (LWATT) in the LCYCMODE register (Address 0xE702).

The total active energy accumulated over an integer number of half

line cycles (or zero crossings) is written to the watthour accumula-

tion registers after the number of half line cycles specified by the

LINECYC register is detected. When using the line cycle accumu-

lation mode, set Bit 6 (RSTREAD) of the LCYCMODE register

to Logic 0 because a read with reset of the watthour registers

outside the LINECYC period resets the energy accumulation.

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