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ADE7932 数据表(PDF) 99 Page - Analog Devices |
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ADE7932 数据表(HTML) 99 Page - Analog Devices |
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99 / 120 page  Data Sheet ADE7978/ADE7933/ADE7932 Rev. 0 | Page 99 of 120 REGISTER LIST Table 37. Registers Located in DSP Data Memory RAM Address Register Name R/W1 Bit Length Bit Length During Communication2 Type3 Default Value Description 0x4380 AIGAIN R/W 24 32 ZPSE S 0x000000 Phase A current gain adjust. 0x4381 AVGAIN R/W 24 32 ZPSE S 0x000000 Phase A voltage gain adjust. 0x4382 AV2GAIN R/W 24 32 ZPSE S 0x000000 Phase A V2P channel gain adjust. 0x4383 BIGAIN R/W 24 32 ZPSE S 0x000000 Phase B current gain adjust. 0x4384 BVGAIN R/W 24 32 ZPSE S 0x000000 Phase B voltage gain adjust. 0x4385 BV2GAIN R/W 24 32 ZPSE S 0x000000 Phase B V2P channel gain adjust. 0x4386 CIGAIN R/W 24 32 ZPSE S 0x000000 Phase C current gain adjust. 0x4387 CVGAIN R/W 24 32 ZPSE S 0x000000 Phase C voltage gain adjust. 0x4388 CV2GAIN R/W 24 32 ZPSE S 0x000000 Phase C V2P channel gain adjust. 0x4389 NIGAIN R/W 24 32 ZPSE S 0x000000 Neutral current gain adjust. 0x438A NVGAIN R/W 24 32 ZPSE S 0x000000 Neutral line V1P channel gain adjust. 0x438B NV2GAIN R/W 24 32 ZPSE S 0x000000 Neutral line V2P channel gain adjust. 0x438C AIRMSOS R/W 24 32 ZPSE S 0x000000 Phase A current rms offset. 0x438D AVRMSOS R/W 24 32 ZPSE S 0x000000 Phase A voltage rms offset. 0x438E AV2RMSOS R/W 24 32 ZPSE S 0x000000 Phase A V2P voltage rms offset. 0x438F BIRMSOS R/W 24 32 ZPSE S 0x000000 Phase B current rms offset. 0x4390 BVRMSOS R/W 24 32 ZPSE S 0x000000 Phase B voltage rms offset. 0x4391 BV2RMSOS R/W 24 32 ZPSE S 0x000000 Phase B V2P voltage rms offset. 0x4392 CIRMSOS R/W 24 32 ZPSE S 0x000000 Phase C current rms offset. 0x4393 CVRMSOS R/W 24 32 ZPSE S 0x000000 Phase C voltage rms offset. 0x4394 CV2RMSOS R/W 24 32 ZPSE S 0x000000 Phase C V2P voltage rms offset. 0x4395 NIRMSOS R/W 24 32 ZPSE S 0x000000 Neutral current rms offset. 0x4396 NVRMSOS R/W 24 32 ZPSE S 0x000000 Neutral line V1P voltage rms offset. 0x4397 NV2RMSOS R/W 24 32 ZPSE S 0x000000 Neutral line V2P voltage rms offset. 0x4398 ISUMLVL R/W 24 32 ZPSE S 0x000000 Threshold used to compare the absolute sum of phase currents and the neutral current. 0x4399 APGAIN R/W 24 32 ZPSE S 0x000000 Phase A power gain adjust. 0x439A BPGAIN R/W 24 32 ZPSE S 0x000000 Phase B power gain adjust. 0x439B CPGAIN R/W 24 32 ZPSE S 0x000000 Phase C power gain adjust. 0x439C AWATTOS R/W 24 32 ZPSE S 0x000000 Phase A total active power offset adjust. 0x439D BWATTOS R/W 24 32 ZPSE S 0x000000 Phase B total active power offset adjust. 0x439E CWATTOS R/W 24 32 ZPSE S 0x000000 Phase C total active power offset adjust. 0x439F AVAROS R/W 24 32 ZPSE S 0x000000 Phase A total reactive power offset adjust. 0x43A0 BVAROS R/W 24 32 ZPSE S 0x000000 Phase B total reactive power offset adjust. 0x43A1 CVAROS R/W 24 32 ZPSE S 0x000000 Phase C total reactive power offset adjust. 0x43A2 VLEVEL R/W 24 32 ZPSE S 0x000000 Register used in the algorithm that computes the fundamental active and reactive powers. See Equation 28. 0x43A3 AFWATTOS R/W 24 32 ZPSE S 0x000000 Phase A fundamental active power offset adjust. 0x43A4 BFWATTOS R/W 24 32 ZPSE S 0x000000 Phase B fundamental active power offset adjust. 0x43A5 CFWATTOS R/W 24 32 ZPSE S 0x000000 Phase C fundamental active power offset adjust. 0x43A6 AFVAROS R/W 24 32 ZPSE S 0x000000 Phase A fundamental reactive power offset adjust. 0x43A7 BFVAROS R/W 24 32 ZPSE S 0x000000 Phase B fundamental reactive power offset adjust. 0x43A8 CFVAROS R/W 24 32 ZPSE S 0x000000 Phase C fundamental reactive power offset adjust. |
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